Patents by Inventor Yuichi Kado

Yuichi Kado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11201550
    Abstract: A control device includes a detector which detects a voltage of each of the DC terminals in a state where a DC voltage is applied to one of the DC terminals and said one of the DC terminals is maintained at a fixed voltage; a minimum voltage terminal selection circuit which selects a low-voltage DC terminal with a lowest voltage among the DC terminals to which the DC voltage has not been applied, based on a detection result of the detector; and an arithmetic circuit which generates, in a connected bridge circuit to which the DC voltage has been applied, an AC voltage of a size that is equal to a difference between the voltage of said one of the DC terminals to which the DC voltage has been applied and the voltage of the low-voltage DC terminal selected by the minimum voltage terminal selection circuit.
    Type: Grant
    Filed: August 17, 2018
    Date of Patent: December 14, 2021
    Assignee: IKS CO., LTD.
    Inventors: Yuichi Kado, Takashi Imai
  • Publication number: 20200195156
    Abstract: In a control device which controls a drive of a static DC converter in which three or more self-excited single phase inverters, to which DC capacitors are respectively connected in parallel, are connected via a high frequency transformer, provided are a detector which detects a voltage of each of the DC terminals in a state where a DC voltage is applied to one of the DC terminals and that DC terminal is maintained at a fixed voltage, a minimum voltage terminal selection circuit which selects the DC terminal with a lowest voltage among the DC terminals to which the DC voltage has not been applied based on a detection result of the detector, and an arithmetic circuit which generates, in the self-excited single phase inverter to which the DC voltage has been applied, an AC voltage of a size that is comparable to a difference between the voltage of the DC terminal to which the DC voltage has been applied and the voltage of the DC terminal selected by the minimum voltage terminal selection circuit.
    Type: Application
    Filed: August 17, 2018
    Publication date: June 18, 2020
    Inventors: Yuichi KADO, Takashi IMAI
  • Patent number: 8666312
    Abstract: A signal electrode (11A) and a ground electrode (11B) are disposed respectively on surfaces of a case (10). In this way, the signal electrode (11A) and the ground electrode (11B) do not come into contact with any electric component, such as a transmission circuit (21), disposed inside the case (10), and thus a reduction in an electric field (Ec) induced in an electric-field transmission medium can be prevented. In addition, a certain distance between the signal electrode (11A) and the ground electrode (11B) is kept, and thus a reduction in the electric field (Ec) induced in the electric-field transmission medium can be prevented. Furthermore, the contactability between the signal electrode (11A) and the electric-field transmission medium is improved, and thus the electric field (Ec) induced in the electric-field transmission medium can be increased.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: March 4, 2014
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Ryusuke Kawano, Katsuyuki Ochiai, Mitsuru Shinagawa, Yuichi Kado, Takuji Harada, Hideyuki Okamoto, Ryoichi Matsumoto
  • Publication number: 20100105323
    Abstract: A signal electrode (11A) and a ground electrode (11B) are disposed respectively on surfaces of a case (10). In this way, the signal electrode (11A) and the ground electrode (11B) do not come into contact with any electric component, such as a transmission circuit (21), disposed inside the case (10), and thus a reduction in an electric field (Ec) induced in an electric-field transmission medium can be prevented. In addition, a certain distance between the signal electrode (11A) and the ground electrode (11B) is kept, and thus a reduction in the electric field (Ec) induced in the electric-field transmission medium can be prevented. Furthermore, the contactability between the signal electrode (11A) and the electric-field transmission medium is improved, and thus the electric field (Ec) induced in the electric-field transmission medium can be increased.
    Type: Application
    Filed: March 21, 2008
    Publication date: April 29, 2010
    Applicants: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Ryusuke Kawano, Katsuyuki Ochiai, Mitsuru Shinagawa, Yuichi Kado, Takuji Harada, Hideyuki Okamoto, Ryoichi Matsumoto
  • Publication number: 20080199124
    Abstract: Optical generation and modulation is carried out in the optical domain and converted to, for example, the THz band using suitable optical/electrical conversion hardware. In accordance with one embodiment of the present invention, an electrooptic modulator is significantly overdriven to create sidebands on an optical carrier signal. An arrayed waveguide grating or other suitable filter is then used to filter the optical signal and remove the carrier signal and unwanted sidebands. The desired sidebands are then combined to create an optical signal that can be encoded with data through suitable modulation. Additional embodiments are disclosed.
    Type: Application
    Filed: May 4, 2006
    Publication date: August 21, 2008
    Inventors: Tadao Nagatsuma, Yuichi Kado, Richard Ridgway
  • Patent number: 5989981
    Abstract: A method of manufacturing an SOI substrate uses an SOI substrate having a first single-crystal silicon layer, an insulating layer formed on the first single-crystal silicon layer, and a second single-crystal silicon layer formed on the insulating layer. The surface of the second single-crystal silicon layer is thermally oxidized. The second single-crystal silicon layer is controlled to have a predetermined thickness by removing the thermally oxidized surface. This step controlling the second single-crystal silicon layer to have a predetermined thickness includes the step of eliminating, by annealing, a stacking fault formed by the thermal oxidation.
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: November 23, 1999
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Sadao Nakashima, Terukazu Ohno, Toshiaki Tsuchiya, Tetsushi Sakai, Shinji Nakamura, Takemi Ueki, Yuichi Kado, Tadao Takeda