Abstract: A clock mark for extracting a clock when reproducing information from a recording medium and a synchronization mark for detection a bit-slip are recorded so that a part of the synchronization mark is identical to a pattern of the clock mark. A bit-slip detection and a clock detection are performed simultaneously with a single mark by multi-value recording.

Abstract: A data recording device comprises a block division unit dividing a sequence of user data blocks into first blocks and second blocks, a plurality of multi-level data generating units generating multi-level data blocks from the first blocks and the second block, a group data storage unit storing first and second groups of code data corresponding to one user data block, a plurality of averaging units each calculating an average of DC levels based on the multi-level data of one of the blocks, a level comparison unit comparing each of the DC level averages with a predetermined value; a revision data generating unit generating a revision data using a result of the comparison, a data selection unit selecting one of the first and second groups of code data, and an output storage unit storing the first blocks, the second blocks generated using the selected code data, and the revision data.

Abstract: A data recording device comprises a block division unit dividing a sequence of user data blocks into first blocks and second blocks, a plurality of multi-level data generating units generating multi-level data blocks from the first blocks and the second block, a group data storage unit storing first and second groups of code data corresponding to one user data block, a plurality of averaging units each calculating an average of DC levels based on the multi-level data of one of the blocks, a level comparison unit comparing each of the DC level averages with a predetermined value; a revision data generating unit generating a revision data using a result of the comparison, a data selection unit selecting one of the first and second groups of code data, and an output storage unit storing the first blocks, the second blocks generated using the selected code data, and the revision data.

Abstract: A recording medium with a data format is provided. The data format includes frames and an ECC block. Each of the frames includes a plurality of n-level data, n being an integer satisfying n?3, a clock mark that is n-level data for sampling the n-level data, and a frame sync that is n-level data for indicating a break point of the n-level data of a predetermined amount. The ECC block is a data block for error correction using a product code. The ECC block is formed by binary data of J×K words, where J is a natural number indicating the number of valid binary data in each frame, and K is a natural number indicating the number of frames when the n-level data are converted into binary data.

Abstract: A clock mark for extracting a clock when reproducing information from a recording medium and a synchronization mark for detection a bit-slip are recorded so that a part of the synchronization mark is identical to a pattern of the clock mark. A bit-slip detection and a clock detection are performed simultaneously with a single mark by multi-value recording.

Abstract: In a data processing method of converting (n×m?1)-bit data to multi-level data of m symbols of n bits per symbol, n and m being integers satisfying n?2 and m?2, respectively, the m symbols each comprising n-bit data are arranged in m columns in an n×m matrix, with a value of each of the m symbols being set to an even or odd number, by creating the m symbols each including (n?1)-bit data of the (n×m?1)-bit data, arranging the m symbols in the m columns so that the {(n?1)×m}-bit data is arranged in upper-side {(n?1)×m} bits of the n×m matrix, and converting the remaining (m?1)-bit data of the (n×m?1)-bit data to m-bit data so that the m-bit data is arranged in a row in lower-side m bits of the n×m matrix.

Abstract: A data recording device comprises a block division unit dividing a sequence of user data blocks into first blocks and second blocks, a plurality of multi-level data generating units generating multi-level data blocks from the first blocks and the second block, a group data storage unit storing first and second groups of code data corresponding to one user data block, a plurality of averaging units each calculating an average of DC levels based on the multi-level data of one of the blocks, a level comparison unit comparing each of the DC level averages with a predetermined value; a revision data generating unit generating a revision data using a result of the comparison, a data selection unit selecting one of the first and second groups of code data, and an output storage unit storing the first blocks, the second blocks generated using the selected code data, and the revision data.

Abstract: A recording medium with a data format is provided. The data format includes frames and an ECC block. Each of the frames includes a plurality of n-level data, n being an integer satisfying n≧3, a clock mark that is n-level data for sampling the n-level data, and a frame sync that is n-level data for indicating a break point of the n-level data of a predetermined amount. The ECC block is a data block for error correction using a product code. The ECC block is formed by binary data of J×K words, where J is a natural number indicating the number of valid binary data in each frame, and K is a natural number indicating the number of frames when the n-level data are converted into binary data.

Abstract: In a data processing method of converting (n×m−1)-bit data to multi-level data of m symbols of n bits per symbol, n and m being integers satisfying n≧2 and m≧2, respectively, the m symbols each comprising n-bit data are arranged in m columns in an n×m matrix, with a value of each of the m symbols being set to an even or odd number, by creating the m symbols each including (n−1)-bit data of the (n×m−1)-bit data, arranging the m symbols in the m columns so that the {(n−1)×m}-bit data is arranged in upper-side {(n−1)×m} bits of the n×m matrix, and converting the remaining (m−1)-bit data of the (n×m−1)-bit data to m-bit data so that the m-bit data is arranged in a row in lower-side m bits of the n×m matrix.

Abstract: A reference clock frequency divider feasible for a motor drive IC (Integrated Circuit), optical disk drive, hard disk drive or similar apparatus. The frequency divider is capable of setting not only integral frequency division ratios but also decimal frequency division ratios without any circuit modification.

Abstract: A data reproduction device for reproducing a data recorded in a recording medium having a data area and an error correction area including only error correction code data. The areas are formed in the medium. The device comprises a memory device for memorizing the error correction code data of the error correction area and a control device for reading the data from the error correction area and memorizing the read data in the memory device prior to reproducing the data when the medium is installed in the reproducing device. When an error is included in a data reproduced from the data of the data area, the control device controls the reproducing device in such a way that an error correction code data corresponding to the data including the error is read from the memory device so as to correct the error of the data.

Abstract: A device for correcting errors of a long-distance code, when decoding a long-distance code capable of correcting errors up to maximum t words of which one word is composed of w bits, for obtaining a coefficient of each term of an error-position polynomial by setting data words A.sub.(i+j=2) to each element q.sub.i,j of a matrix having t rows and (t+1) columns, where 1.ltoreq.i.ltoreq.t, 1.ltoreq.j.ltoreq.t+1, A.sub.0 to A.sub.2t-1 represent syndromes or error positions, and by performing a left-hand elementary transformation over the matrix in order to obtain each coefficient of each term of the error-position polynomial or error patterns from syndromes has an error position calculating device for obtaining the error positions by utilizing a coefficient calculating circuit of the error-position polynomial and an error pattern calculating circuit.

Abstract: An error correcting system for obtaining an error location polynomial from a syndrome or an error pattern from an error location and a syndrome when decoding a long distance code, the error correcting system comprising steps of setting a data word A.sub.(i+j-2) to each element q.sub.i,j of a matrix consisting of p rows and (p+1) columns [where 1.ltoreq.i.ltoreq.p, 1.ltoreq.j.ltoreq.p+1 and A.sub.0 to A.sub.2p-1 denote a syndrome of an error location] performing left hand elementary transformation over the matrix, and obtaining the coefficient of each term of the polynomial.

Abstract: A voice signal coding method for compressing voice data by coding is provided. PCM coded voice data are grouped into blocks in a timed sequence, each block having a predetermined number of data. A scale data representing a MSB corresponding to a maximum value in absolute value in each block is identified. Then, a code data is defined by a predetermined number of bits of data containing the MSB, thereby having the voice data compressed by coding. The code data is corrected such that an error between a decoded value of the code data and the original voice data corresponding to the code data is minimized. With such a correction step, the code data is refined such that a reproduced voice signal by decoding the thus corrected code data is very close to the original voice signal.