Patents by Inventor Yuichi Kawano

Yuichi Kawano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151166
    Abstract: A decompression device is attached to an exhaust camshaft, and the exhaust camshaft is supported by a cylinder head. The decompression device includes a decompression camshaft formed with a decompression cam that can protrude and be immersed with respect to a base circle of an exhaust cam of the exhaust camshaft, a decompression arm that moves in an opening direction due to centrifugal force accompanying rotation of the exhaust camshaft to protrude the decompression cam, and a spring that moves the decompression arm in a closing direction by spring force resisting the centrifugal force to immerse the decompression cam. In the decompression device, the opening direction of the decompression arm can be changed in a same direction or in an opposite direction to a rotation direction of the exhaust camshaft for each cylinder.
    Type: Application
    Filed: October 6, 2023
    Publication date: May 9, 2024
    Applicant: SUZUKI MOTOR CORPORATION
    Inventors: Yuichi KAWANO, Hidekuni OTA, Shintaro ISHIDA
  • Patent number: 10192755
    Abstract: The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: January 29, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Masahiro Matsumoto, Kazuyoshi Maekawa, Yuichi Kawano
  • Patent number: 10083924
    Abstract: A semiconductor device includes: a pad electrode 9a formed in an uppermost layer of a plurality of wiring layers; a base insulating film 11 having an opening 11a on the pad electrode 9a; a base metal film UM formed on the base insulating film 11; a redistribution line RM formed on the base metal film UM; and a cap metal film CM formed so as to cover an upper surface and a side surface of the redistribution line RM. In addition, in a region outside the redistribution line RM, the base metal film UM made of a material different from that of the redistribution line RM and the cap metal film CM made of a material different from the redistribution line RM are formed between the cap metal film CM formed on the side surface of the redistribution line RM and the base insulating film 11, and the base metal film UM and the cap metal film CM are in direct contact with each other in the region outside the redistribution line RM.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: September 25, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Kazuyoshi Maekawa, Yuichi Kawano
  • Publication number: 20180197753
    Abstract: The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.
    Type: Application
    Filed: March 8, 2018
    Publication date: July 12, 2018
    Inventors: Masahiro MATSUMOTO, Kazuyoshi MAEKAWA, Yuichi KAWANO
  • Patent number: 9972505
    Abstract: The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: May 15, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Masahiro Matsumoto, Kazuyoshi Maekawa, Yuichi Kawano
  • Patent number: 9885400
    Abstract: There is provided a balancer device of an engine, configured to reduce rotation vibrations of the engine. A crankshaft is provided with a primary drive gear. A countershaft is provided with a primary driven gear meshed with the primary drive gear. A plurality of balancer shafts are provided with balancer driven gears meshed with the primary drive gear.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: February 6, 2018
    Assignee: SUZUKI MOTOR CORPORATION
    Inventors: Hiroki Yamauchi, Yuichi Kawano, Shintaro Yagi
  • Publication number: 20170114860
    Abstract: There is provided a balancer device of an engine, configured to reduce rotation vibrations of the engine. A crankshaft is provided with a primary drive gear. A countershaft is provided with a primary driven gear meshed with the primary drive gear. A plurality of balancer shafts are provided with balancer driven gears meshed with the primary drive gear.
    Type: Application
    Filed: October 14, 2016
    Publication date: April 27, 2017
    Applicant: SUZUKI MOTOR CORPORATION
    Inventors: Hiroki YAMAUCHI, Yuichi KAWANO, Shintaro YAGI
  • Publication number: 20160379946
    Abstract: A semiconductor device includes: a pad electrode 9a formed in an uppermost layer of a plurality of wiring layers; a base insulating film 11 having an opening 11a on the pad electrode 9a; a base metal film UM formed on the base insulating film 11; a redistribution line RM formed on the base metal film UM; and a cap metal film CM formed so as to cover an upper surface and a side surface of the redistribution line RM. In addition, in a region outside the redistribution line RM, the base metal film UM made of a material different from that of the redistribution line RM and the cap metal film CM made of a material different from the redistribution line RM are formed between the cap metal film CM formed on the side surface of the redistribution line RM and the base insulating film 11, and the base metal film UM and the cap metal film CM are in direct contact with each other in the region outside the redistribution line RM.
    Type: Application
    Filed: November 13, 2014
    Publication date: December 29, 2016
    Inventors: Kazuyoshi MAEKAWA, Yuichi KAWANO
  • Publication number: 20160181184
    Abstract: The present invention makes it possible to improve the reliability of a semiconductor device. The semiconductor device has, over a semiconductor substrate, a pad electrode formed at the uppermost layer of a plurality of wiring layers, a surface protective film having an opening over the pad electrode, a redistribution line being formed over the surface protective film and having an upper surface and a side surface, a sidewall barrier film comprising an insulating film covering the side surface and exposing the upper surface of the redistribution line, and a cap metallic film covering the upper surface of the redistribution line. Then the upper surface and side surface of the redistribution line are covered with the cap metallic film or the sidewall barrier film and the cap metallic film and the sidewall barrier film have an overlapping section.
    Type: Application
    Filed: November 17, 2015
    Publication date: June 23, 2016
    Inventors: Masahiro MATSUMOTO, Kazuyoshi MAEKAWA, Yuichi KAWANO
  • Patent number: 8960124
    Abstract: Provided are a plasma processing apparatus and a plasma processing method wherein particles generated due to the inner potential of an inner cylinder disposed inside of a vacuum container are reduced. The plasma processing apparatus has, inside of a metal vacuum chamber (11), the inner cylinder (15) composed of a surface-alumited aluminum, disposes a substrate in a plasma diffusion region, and performs plasma processing. A plurality of protruding portions (15a) in point-contact with the vacuum chamber (11) are provided on the lower end portion of the inner cylinder (15), the alumite film (16) on the leading end portion (15b) of each of the protruding portion (15a) is removed, and the inner cylinder and the vacuum chamber (11) are electrically connected to each other.
    Type: Grant
    Filed: May 24, 2010
    Date of Patent: February 24, 2015
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Ryuichi Matsuda, Kazuto Yoshida, Yuichi Kawano
  • Patent number: 8686538
    Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: April 1, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Katsuhiko Hotta, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano
  • Patent number: 8337960
    Abstract: A seasoning method for a film-forming apparatus configured to form a silicon nitride film on a substrate placed in a process chamber. The method is conducted for reducing particles in the apparatus. The method comprises executing the plasma cleaning of the process chamber to remove a film deposited on the inner wall thereof (step S1), subsequently depositing an amorphous silicon film (step S2), depositing thereon a silicon nitride film in which the nitrogen content gradually increases in the thickness direction (step S3), and keeping the inside of the process chamber being filled with a rare-gas plasma until film formation on the substrate is initiated (step S4).
    Type: Grant
    Filed: February 19, 2007
    Date of Patent: December 25, 2012
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Tadashi Shimazu, Yuichi Kawano
  • Publication number: 20120319235
    Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Inventors: Katsuhiko Hotta, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano
  • Patent number: 8269309
    Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: September 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Katsuhiko Hotta, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano
  • Publication number: 20120125891
    Abstract: Provided are a plasma processing apparatus and a plasma processing method wherein particles generated due to the inner potential of an inner cylinder disposed inside of a vacuum container are reduced. The plasma processing apparatus has, inside of a metal vacuum chamber (11), the inner cylinder (15) composed of a surface-alumited aluminum, disposes a substrate in a plasma diffusion region, and performs plasma processing. A plurality of protruding portions (15a) in point-contact with the vacuum chamber (11) are provided on the lower end portion of the inner cylinder (15), the alumite film (16) on the leading end portion (15b) of each of the protruding portion (15a) is removed, and the inner cylinder and the vacuum chamber (11) are electrically connected to each other.
    Type: Application
    Filed: May 24, 2010
    Publication date: May 24, 2012
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Ryuichi Matsuda, Kazuto Yoshida, Yuichi Kawano
  • Publication number: 20110169128
    Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.
    Type: Application
    Filed: March 25, 2011
    Publication date: July 14, 2011
    Inventors: KATSUHIKO HOTTA, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano
  • Patent number: 7972946
    Abstract: Provided are a plasma treatment method and a plasma treatment device capable of forming a silicon nitride film having high compressive stress. In the plasma treatment method for depositing the silicon nitride film on a process target substrate by use of plasma of raw material gas containing silicon and hydrogen and of nitrogen gas, ion energy for disconnecting nitrogen-hydrogen bonding representing a state of bonding between the hydrogen in the raw material gas and the nitrogen gas is applied to the process target substrate so as to reduce an amount of nitrogen-hydrogen bonding contained in the silicon nitride film.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: July 5, 2011
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Tadashi Shimazu, Masahiko Inoue, Toshihiko Nishimori, Yuichi Kawano
  • Patent number: 7968966
    Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: June 28, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Katsuhiko Hotta, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano
  • Publication number: 20100323975
    Abstract: A therapeutic agent for cerebral ischemic injury contains at least one selected from L-alanyl-L-histidine and glycyl-L-histidine as an active ingredient. The therapeutic agent for cerebral ischemic injury preferably has a dosage form as an injection for intravenous administration. The therapeutic agent for cerebral ischemic injury having a dosage form as an aqueous injection contains at least one selected from L-alanyl-L-histidine and glycyl-L-histidine at a concentration of preferably 0.3 to 3.5 mol/L, and more preferably 0.6 to 2.1 mol/L.
    Type: Application
    Filed: December 25, 2008
    Publication date: December 23, 2010
    Applicant: OTSUKA PHARMACEUTICAL FACTORY, INC.
    Inventors: Yuichi Kawano, Kazuhisa Doi, Takuya Nii
  • Publication number: 20100013046
    Abstract: In order to improve the reliability of a semiconductor device having a fuse formed by a Damascene technique, a barrier insulating film and an inter-layer insulating film are deposited over a fourth-layer wiring and a fuse. The barrier insulating film is an insulating film for preventing the diffusion of Cu and composed of a SiCN film deposited by plasma CVD like the underlying barrier insulating film. The thickness of the barrier insulating film covering the fuse is larger than the thickness of the underlying barrier insulating film so as to improve the moisture resistance of the fuse.
    Type: Application
    Filed: September 21, 2009
    Publication date: January 21, 2010
    Inventors: Katsuhiko Hotta, Kyoko Sasahara, Taichi Hayamizu, Yuichi Kawano