Patents by Inventor Yuichi Komano

Yuichi Komano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120239721
    Abstract: An arithmetic device includes an input unit inputting data that are elements of a group; a converting unit is configured, when the input data are in a second representation, to convert the input data into a first representation and to perform arithmetic operation on the converted first representation using an operand in the first representation in which at least one subcomponent is a zero element to convert the converted first representation into first converted data expressed in the first representation, and when the input data are in the first representation, to perform arithmetic operation on the input data using the operand in the first representation in which at least one subcomponent is a zero element to convert the input data into second converted data expressed in the first representation; and an operating unit that performs arithmetic processing on the first or the second converted data using secret information.
    Type: Application
    Filed: March 16, 2012
    Publication date: September 20, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taichi ISOGAI, Kenichiro Furuta, Hirofumi Muratani, Kenji Ohkuma, Tomoko Yonemura, Yoshikazu Hanatani, Atsushi Shimbo, Hanae Ikeda, Yuichi Komano
  • Publication number: 20120233461
    Abstract: According to an aspect of the present invention, there is provided a data transmitting apparatus including an authenticator generating unit and a communicating unit. The authenticator generating unit generates a first authenticator by using a first encryption key and generates a second authenticator including a first to an n-th fragment information items by using a second encryption key. The communicating unit transmits a first packet including the first authenticator and the first fragment information item to a destination device and, after the first packet is transmitted, if a response indicating successful authentication is not received from the destination device within a certain period, sequentially transmits an i-th packet (i is an integer being 2 or more and n or less) including the i-th fragment information item to the destination device.
    Type: Application
    Filed: September 8, 2011
    Publication date: September 13, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshinari TAKAHASHI, Fangming ZHAO, Shinji YAMANAKA, Yuichi KOMANO, Kentaro UMESAWA
  • Publication number: 20120224695
    Abstract: The debugging unit writes a public key of the key issuing server and an initializing program given from outside, to the storage unit. The instruction executing unit reads and executes the initializing program stored in the storage unit. The debug disabling unit disables the debugging unit. The public-key encrypting unit encrypts the random number by the public key in the storage unit, the random number generated by the random number generating unit after the debugging unit is disabled. The transmitting unit transmits the encrypted random number to the key issuing server. The receiving unit receives an individual key encrypted by the random number from the key issuing server. The individual-key writing unit decrypts the encrypted individual key by the random number to obtain the individual key and write the individual key to the storage unit.
    Type: Application
    Filed: September 16, 2011
    Publication date: September 6, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mikio Hashimoto, Shinji Yamanaka, Yuichi Komano, Taku Kato, Hiroshi Isozaki
  • Patent number: 8233616
    Abstract: An encryption processing unit executes an arithmetic operation decided in advance and outputs an arithmetic result as an element on an algebraic torus. A compressing unit outputs, when the arithmetic result is an exceptional point representing an element on the algebraic torus that cannot be compressed by a compression map for compressing an element on the algebraic torus into affine representation, a compression result obtained by compressing the arithmetic result according to the compression map and outputs, when the arithmetic result is the exceptional point, an element belonging to a specific set decided in advance that does not overlap a set to which a compression result obtained by compressing the arithmetic result, which is not the exceptional point, belongs.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: July 31, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirofumi Muratani, Tomoko Yonemura, Atsushi Shimbo, Kenji Ohkuma, Taichi Isogai, Yuichi Komano, Kenichiro Furuta, Yoshikazu Hanatani, Hanae Ikeda
  • Publication number: 20120191387
    Abstract: According to one embodiment, an information processing device includes an obtaining unit, a generating unit, and a transmitting unit. The obtaining unit obtains a power consumption of electrical equipment at least once per unit time. The generating unit generates a plurality of pieces of partial information by using a first power consumption and a first value calculated according to a predetermined rule. The generating unit generates a plurality of pieces of partial information by using a second power consumption and the first value. The first power consumption is obtained at a first period. The second power consumption is obtained at a second period different from the first period. The second power consumption is obtained later than the first power consumption. The transmitting unit transmits the pieces of partial information to a plurality of different storage servers, respectively.
    Type: Application
    Filed: January 24, 2012
    Publication date: July 26, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinji Yamanaka, Yuichi Komano, Toshinari Takahashi, Satoshi Ito
  • Publication number: 20120131078
    Abstract: According to one embodiment, a first shift amount calculation unit counts the number of continuous zeros from a less significant bit toward a more significant bit of an intermediate result of a computation of Montgomery multiplication result z and calculates a first shift amount. A second shift amount calculation unit counts the number of continuous zeros from a less significant bit toward a more significant bit of redundant-binary-represented integer x and calculates a second shift amount. An addition/subtraction unit calculates the intermediate result by adding/subtracting, with respect to the intermediate result which has been bit-shifted by the first shift amount, the integer p, and the integer y which has been bit-shifted by the second shift amount. An output unit outputs, as the Montgomery multiplication result z, the intermediate result when the sum of the first shift amounts is equal to the number of bits of the integer p.
    Type: Application
    Filed: January 30, 2012
    Publication date: May 24, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideo Shimizu, Yuichi Komano, Koichi Fujisaki, Shinichi Kawamura
  • Publication number: 20120124114
    Abstract: According to one embodiment, a representation converting unit converts a set of n elements (h0, h1, . . . , hn?1) (hi: a member of a finite field Fp?m, 0?i?n?1) that is a projective representation of a member g of an n-th degree algebraic torus Tn(Fp?m) (n: positive integer, p: prime number, m: positive integer) into a limited projected representation expressed by a set of n elements (h?0, h?1, . . . , h?n?1) (h?i: a member of the finite field Fp?m, 0?i?n?1) in which at least one element out of the n elements is a zero element 0 or an identity element 1. An arithmetic unit omits part of Fp?m operation that is arithmetic operation in the finite field Fp?m based on a fact that an element in the set of n elements (h?0, h?1, . . . , h?n?1) represented by the limited projective representation is a zero element “0” or an identity element “1” when performing Fp?mn operation that is arithmetic operation of a finite field Fp?mn in combination with the Fp?m operation.
    Type: Application
    Filed: January 23, 2012
    Publication date: May 17, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tomoko YONEMURA, Taichi ISOGAI, Hirofumi MURATANI, Atsushi SHIMBO, Yoshikazu HANATANI, Kenichiro FURUTA, Kenji OHKUMA, Yuichi KOMANO, Hanae IKEDA
  • Publication number: 20120069998
    Abstract: According to one embodiment, in an encryption device, a segmentation unit segments masked plain data into pieces of first segmented data. A first processing unit generates pieces of second segmented data from the pieces of first segmented data. A nonlinear transform unit generates pieces of third segmented data transformed from the pieces of second segmented data. A data integration unit integrates fourth segmented data to generate masked encrypted data. An unmask processing unit generates encrypted data from the masked encrypted data. The exclusive OR of the pieces of second segmented data matches the exclusive OR of input data, subjected to nonlinear transform processing and calculated from the plain data, and the first mask. The exclusive OR of the pieces of third segmented data matches the exclusive OR of transform data, obtained when the nonlinear transform processing is performed on the input data, and the second mask.
    Type: Application
    Filed: July 27, 2011
    Publication date: March 22, 2012
    Inventors: Tsukasa ENDO, Hideo Shimizu, Yuichi Komano, Hanae Ikeda, Atsushi Shimbo
  • Publication number: 20120059528
    Abstract: According to an embodiment, a server to which a plurality of power meters each measuring an amount of power consumption of an electric appliance is connected, includes a receiving unit, a first storage unit and a calculating unit. The receiving unit receives a calculation result. The calculation result is calculated based on the amount of power consumption measured by each of the plurality of power meters and each of random numbers generated according to a probability distribution by each of the plurality of power meters. The first storage unit stores therein parameters for generating random numbers. The calculating unit calculates an estimation value of a sum or average of the amounts of power consumption using the calculation results and the parameters. The estimation value is used for determining whether to perform power control.
    Type: Application
    Filed: June 21, 2011
    Publication date: March 8, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kentaro UMESAWA, Yuichi KOMANO, Shinji YAMANAKA, Toshinari TAKAHASHI
  • Publication number: 20120054495
    Abstract: According to one embodiment, there is provided a data transmission processing device, including: a identifying portion configured to identify a module having sent out data; a storage portion configured to store a sending-out method definition list defined in accordance with each source module and indicating a processing method for the data, the processing method including a data conversion method or permission/prohibition of communication; a determining portion configured to determine a processing method corresponding to the source module identified by the identifying portion by referring to the sending-out method definition list; a converting portion configured to convert the data when the data conversion method is included in the processing method determined by the determining portion; and a transmission portion configured to send out the data or the converted data when the determining portion concludes that communication is permitted.
    Type: Application
    Filed: August 3, 2011
    Publication date: March 1, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshinari TAKAHASHI, Shinji YAMANAKA, Yuichi KOMANO
  • Publication number: 20100063986
    Abstract: In a computing device that calculates a square of an element in a finite field, a vector representation of the element in the finite field is accepted. The vector representation includes a plurality of elements. The computing device performs a multiplication operation on a base field using the accepted elements, and obtains a multiplication value. The multiplication operation is determined by a condition under which the element in the finite field is placed in an algebraic torus. The computing device performs an addition and subtraction operation using the obtained multiplication value and the accepted elements, and obtains a calculation result of the square of the element. The addition and subtraction operation is determined by the condition. The computing device then outputs the calculation result.
    Type: Application
    Filed: February 26, 2009
    Publication date: March 11, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomoko YONEMURA, Hirofumi MURATANI, Atsushi SHIMBO, Kenji OHKUMA, Taichi ISOGAI, Yuichi KOMANO, Kenichiro FURUTA, Yoshikazu HANATANI
  • Publication number: 20100046743
    Abstract: A compressing unit compresses an element on an algebraic torus into affine representation according to a compression map. A determining unit determines whether a target element on the algebraic torus to be compressed is an exceptional point representing an element on the algebraic torus that cannot be compressed by the compression map. The compressing unit generates, when it is determined that the target element is the exceptional point, a processing result including exceptional information indicating that the target element is the exceptional point, and generates, when it is determined that the target element is not the exceptional point, a processing result including affine representation obtained by compressing the target element according to the compression map.
    Type: Application
    Filed: March 18, 2009
    Publication date: February 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirofumi Muratani, Tomoko Yonemura, Atsushi Shimbo, Kenji Ohkuma, Taichi Isogai, Yuichi Komano, Kenichiro Furuta, Yoshikazu Hanatani
  • Publication number: 20100046742
    Abstract: An encryption processing unit executes an arithmetic operation decided in advance and outputs an arithmetic result as an element on an algebraic torus. A compressing unit outputs, when the arithmetic result is an exceptional point representing an element on the algebraic torus that cannot be compressed by a compression map for compressing an element on the algebraic torus into affine representation, a compression result obtained by compressing the arithmetic result according to the compression map and outputs, when the arithmetic result is the exceptional point, an element belonging to a specific set decided in advance that does not overlap a set to which a compression result obtained by compressing the arithmetic result, which is not the exceptional point, belongs.
    Type: Application
    Filed: March 18, 2009
    Publication date: February 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hirofumi MURATANI, Tomoko Yonemura, Atsushi Shimbo, Kenji Ohkuma, Taichi Isogai, Yuichi Komano, Kenichiro Furuta, Yoshikazu Hanatani, Hanae Ikeda
  • Publication number: 20100046741
    Abstract: An input unit inputs encrypted data that elements of a subgroup and expressed in an affine representation. A transforming unit transforms the inputted encrypted data into projective representation data expressed in a projective representation. A plain data calculating unit subjects the projective representation data to a decrypting process previously defined by a cryptosystem, thereby calculating plain data expressed in the projective representation.
    Type: Application
    Filed: February 23, 2009
    Publication date: February 25, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Taichi ISOGAI, Tomoko YONEMURA, Hirofumi MURATANI, Atsushi SHIMBO, Kenji OHKUMA, Yuichi KOMANO, Kenichiro FURUTA, Yoshikazu HANATANI
  • Publication number: 20100046745
    Abstract: A decrypting apparatus that decrypts encrypted data that has been encrypted first data containing plain data, the encrypted data being represented by using an affine representation F_{p?m}×F_{p?m}?*(where p: a prime number; m: a natural number; and ?: exponentiation) obtains encrypted data represented in a vector format and a secret key corresponding to a public key and judges whether a vector component contained in the encrypted data is the affine representation F_{p?m}×F_{p?m}?*. Further, based on the result of the judging process, the decrypting apparatus maps the vector component onto each of the members of an algebraic torus by forming a decompression map and decrypts the encrypted data mapped onto each of the members of the algebraic torus, by using the secret key, therefore obtains the plain data.
    Type: Application
    Filed: March 4, 2009
    Publication date: February 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshikazu Hanatani, Kenji Ohkuma, Atsushi Shimbo, Hirofumi Muratani, Taichi Isogai, Yuichi Komano, Kenichiro Furuta, Tomoko Yonemura
  • Publication number: 20100046746
    Abstract: A parameter generating device includes an input receiving unit that receives a degree n of an algebraic torus T including a group G in which a cryptosystem used in a torus-compressed public key cryptosystem is defined, a size W of a finite field F, and a size S of the group G, an extension-degree determining unit that determines an extension degree m of a finite field Fpm in which the algebraic torus T is defined, a first prime-number search unit that searches for a prime number p, a second prime-number search unit that searches for a prime number q, a test unit that checks whether a multiplication value nm is divisible by the prime number q, a security determining unit that determines that the cryptosystem is secure based on the multiplication value nm, and an output unit that outputs parameters when it is determined that the cryptosystem is secure.
    Type: Application
    Filed: March 19, 2009
    Publication date: February 25, 2010
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tomoko YONEMURA, Hirofumi Muratani, Atsushi Shimbo, Kenji Ohkuma, Taichi Isogai, Yuichi Komano, Kenichiro Furuta, Yoshikazu Hanatani
  • Patent number: 7496759
    Abstract: According to embodiments of the present invention, in a case where a ground for security is laid in difficulty in executing an inverse function operation of a trapdoor one-way function, represented by an RSA problem, even when a signature order advances, an increase of a size of a key can be inhibited. For example, when the first partial data ?i?1,L exceeding (k0+k1) bits when concatenating a random number ri of k0 bits is excluded from an input of binary operation on an input side of a signature generation function. Accordingly, a size of an operation result si of the binary operation is set to be constant at (k0+k2) bits, and, as a result, an input size (key length k bits) of an RSA signature generation function is set to be constant.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: February 24, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuichi Komano, Kazuo Ohta, Shinichi Kawamura, Atsushi Shimbo
  • Publication number: 20080292100
    Abstract: According to an aspect of the present invention, there is provided a non-linear data converter including: first to fourth converters that each performs a respective converting process on an input bit string to output respective output bit string; a generator that generates a random number bit string; and a selector that selects any one of the output bit strings from the first to fourth converters based on the random number bit string. Each of the converting processes is equivalent to performing a first mask process, a non-linear conversion predetermined for an encoding or a decoding and a second mask process.
    Type: Application
    Filed: March 21, 2008
    Publication date: November 27, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuichi KOMANO, Hideo Shimizu, Koichi Fujisaki, Hideyuki Miyake, Atsushi Shimbo
  • Publication number: 20070140478
    Abstract: An encryption apparatus for generating a ciphertext block from a plaintext block is disclosed. A selector selects at random one mask random number from a plurality of random numbers generated by a random number generator. A mask processing unit executes mask processing of a plaintext block by using the mask random number selected by the selector. A storage unit stores a first table representing an initial S-box. A converter converts the first table into a second table representing a deformed S-box on the basis of the mask random number selected by the selector. An encryption unit generates a ciphertext block by shuffling the mask-processed plaintext block using the second table.
    Type: Application
    Filed: September 20, 2006
    Publication date: June 21, 2007
    Inventors: Yuichi Komano, Hideo Shimizu, Atsushi Shimbo
  • Publication number: 20050262354
    Abstract: A multiple signature apparatus includes a determining unit that determines whether signature information of a specific signer is included in multiple signatures created by a plurality of signers for message data. The multiple signature apparatus also includes a signature deleting unit that deletes the signature information of the specific signer from the multiple signatures based on intermediate information created from the message data during creation of a signature by the specific signer if the determining unit determines that the signature information of the specific signer is included in the multiple signatures.
    Type: Application
    Filed: December 14, 2004
    Publication date: November 24, 2005
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yuichi Komano