Patents by Inventor Yuichi Matsushita

Yuichi Matsushita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7323932
    Abstract: A differential amplifier formed on a silicon-on-insulator substrate, including means to prevent the bodies of its differential input transistors from charging to unwanted potentials in the standby state. In one aspect of the invention, the means takes the form of switching transistors inserted between the differential input transistors and their loads. In another aspect of the invention, the means takes the form of switching transistors inserted between the sources and bodies of the differential input transistors. In another aspect of the invention the means is a regulator section that holds the bodies of the differential input transistors at an appropriate potential level.
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: January 29, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yuichi Matsushita
  • Publication number: 20070248376
    Abstract: A layer-thickness regulating member may include a thin plate member and a projection member. The projection member includes a first pressure contact portion that comes into pressure-contact with each of seal areas, a second pressure contact portion that comes into pressure-contact with each of side end areas, and a third pressure contact portion that comes into pressure-contact with a central area. A notched portion is formed at a position of the distal end of the thin plate member where each of the second pressure contact portions is formed, by cutting the thin plate member from an end edge of the distal end toward a downstream side of the rotation direction of the developing agent carrier.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 25, 2007
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Hiroki Mori, Mitsuru Horinoe, Yukiko Nakaya, Yuichi Matsushita, Fan Xu
  • Publication number: 20070223958
    Abstract: A developer cartridge includes a developer cartridge case for accommodating a developer, a developing roller, a toner layer thickness control blade, and a side sealing member. The developing roller is supported by the developer cartridge case such that a circumferential surface thereof is exposed to an outside of the developer cartridge case along a width direction. The toner layer thickness control blade includes a blade body portion made of a metallic plate. A tip portion of the blade body portion is disposed at a sliding portion of the developing roller and the side sealing member so as to contact with the side sealing member. A frictional heat generated at the sliding portion is released to the outside of the developer cartridge case through the blade body portion in order restrain a leak of the developer as much as possible.
    Type: Application
    Filed: March 22, 2007
    Publication date: September 27, 2007
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Hiroki MORI, Mitsuru HORINOE, Yukiko NAKAYA, Yuichi MATSUSHITA, Fan XU
  • Patent number: 7268639
    Abstract: The present invention provides a pulse width modulation (PWM) circuit comprising an PWM control circuit for setting an output signal to low when a logical level of a oscillation signal at a first input terminal changes from low to high, for resetting the output level to low in response to an effective input signal at a second terminal, a charge and discharge means for charging a first node (node1) when the output stays in low, for discharging the stored charge of node1 when the output stays in high, a comparator (C1) for outputting an output signal to the second terminal according to the first node signal and a first reference signal (Vref0), a discharge current controlling means for the stored charge on the first node, wherein the discharge current controlling means comprises a bias circuit 2 for controlling the discharge current based on constant current.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: September 11, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yuichi Matsushita
  • Publication number: 20070122182
    Abstract: A developing device that includes: a developer containing case that contains a developer and comprises a case main body and a supply roller that is rotatably supported on the case main body, wherein the supply roller has a rotary shaft, a cylindrical roller main body that covers the rotary shaft, and a fixed member that is fixed to at least one of the rotary shaft and the roller main body, a gap is provided between an end surface of the roller main body and an inner surface of the case main body, and the fixed member partially occupies the gap.
    Type: Application
    Filed: September 28, 2006
    Publication date: May 31, 2007
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventors: Yuichi Matsushita, Hiroki Mori, Yukiko Nakaya, Fan Xu, Isao Kishi, Masahiro Ishii, Mitsuru Horinoe
  • Patent number: 7224208
    Abstract: A voltage regulator has a reference voltage generator that outputs a reference voltage based on first and second electrical source voltages, an output circuit which generates a predetermined direct-current voltage based on the reference voltage and generates a comparison voltage lower than the predetermined direct-current voltage, and a differential amplifier coupled between the reference voltage generator and the output circuit. The differential amplifier provides a control voltage to the output circuit responsive to a difference between the reference and comparison voltages. The voltage regulator has a voltage adjustment circuit that adjusts the reference voltage responsive to a variation in the first electrical source voltage. The differential amplifier may include a constant-current circuit and an operation current generating circuit.
    Type: Grant
    Filed: February 25, 2005
    Date of Patent: May 29, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yuichi Matsushita
  • Publication number: 20070086805
    Abstract: An arrangement of sealing members seals developer in a developer device. The sealing members minimize or eliminate developer from leaking around the sides of a developer carrier.
    Type: Application
    Filed: September 27, 2006
    Publication date: April 19, 2007
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Yuichi MATSUSHITA, Mitsuru HORINOE, Yukiko NAKAYA, Hiroki MORI
  • Publication number: 20070071491
    Abstract: An image forming apparatus includes a main body, image formation units disposed in the main body, a moving member disposed in the main body, the moving member including a surface facing each image formation unit, a pair of first stoppers disposed in each image formation unit, and a pair of second stoppers disposed in the main body in correspondence with each image formation unit, each second stopper being configured to prevent the developer on the moving member from entering the image formation unit.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 29, 2007
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Hiroki Mori, Mitsuru Horinoe, Yukiko Nakaya, Yuichi Matsushita
  • Publication number: 20070071490
    Abstract: A developing device is provided with a case main body, a developing roller coupled with the case main body, an axis direction seal member coupled with the case main body, and a side seal member coupled with the case main body. The axis direction seal member and the side seal member make contact with one another such that there is no gap between the axis direction seal member and the side seal member in a rotation axis direction of the developing roller. In a rotation direction of the developing roller, an upstream end of the side seal member is located downstream of an upstream end of a contact area between the axis direction seal member and the developing roller.
    Type: Application
    Filed: September 28, 2006
    Publication date: March 29, 2007
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Yukiko Nakaya, Mitsuru Horinoe, Hiroki Mori, Yuichi Matsushita
  • Publication number: 20070071489
    Abstract: A developing device is provided with a case main body, a developing roller capable of rotating and supporting developer housed in the case man body, an adjustment member extending along a rotation axis direction of the developing roller, and a side seal member. The side seal member comprises a first seal member mounted on the case main body, and a second seal member mounted on the adjustment member. The first seal member and the second seal member are configured separately and make contact with one another.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 29, 2007
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventors: Yukiko Nakaya, Mitsuru Horinoe, Hiroki Mori, Yuichi Matsushita
  • Publication number: 20070059031
    Abstract: A developing agent leakage preventing member is provided that is attached to the developer housing and that has a housing attaching face which contacts with the developer housing, a front side face which opposes the housing attaching face, and two side faces each of which connects to each other end portions of the housing attaching face and the front side face in the longitudinal direction of the opening of the developer housing. At least one of the side faces of the developing agent leakage preventing member is formed as an inclined side face that is inclined in a predetermined direction relative to the housing attaching face when pressed from the front side face side. In a developing apparatus, developing agent (toner) leakage is avoided.
    Type: Application
    Filed: August 24, 2006
    Publication date: March 15, 2007
    Applicant: Brother Kogyo Kabushiki Kaisha
    Inventors: Hiroki Mori, Masahiro Ishii, Mitsuru Horinoe, Yukiko Nakaya, Yuichi Matsushita
  • Publication number: 20060245783
    Abstract: A developer cartridge includes a developer roller, a support member and a first seal member. The developer roller has a rotational axis and a peripheral surface. The peripheral surface includes a center zone and an end zone at one end portion in an axial direction. The support member supports the developer roller to be rotatable about the rotational axis. The support member has an opposing surface opposed to the end zone. A protrusion protrudes from the opposing surface, and extends in a direction crossing with the axial direction. The first seal member is disposed between the end zone and the opposing surface in order to prevent developer from leaking out of a space formed between the end zone and the opposing surface.
    Type: Application
    Filed: April 26, 2006
    Publication date: November 2, 2006
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Naoya Kamimura, Yuichi Matsushita
  • Publication number: 20060164166
    Abstract: A differential amplifier formed on a silicon-on-insulator substrate, including means to prevent the bodies of its differential input transistors from charging to unwanted potentials in the standby state. In one aspect of the invention, the means takes the form of switching transistors inserted between the differential input transistors and their loads. In another aspect of the invention, the means takes the form of switching transistors inserted between the sources and bodies of the differential input transistors. In another aspect of the invention the means is a regulator section that holds the bodies of the differential input transistors at an appropriate potential level.
    Type: Application
    Filed: January 6, 2006
    Publication date: July 27, 2006
    Applicant: Oki Electric Industry Co., Ltd.
    Inventor: Yuichi Matsushita
  • Publication number: 20060152184
    Abstract: The present invention provides a pulse width modulation (PWM) circuit comprising an PWM control circuit for setting an output signal to low when a logical level of a oscillation signal at a first input terminal changes from low to high, for resetting the output level to low in response to an effective input signal at a second terminal, a charge and discharge means for charging a first node (node1) when the output stays in low, for discharging the stored charge of node1 when the output stays in high, a comparator (C1) for outputting an output signal to the second terminal according to the first node signal and a first reference signal (Vref0), a discharge current controlling means for the stored charge on the first node, wherein the discharge current controlling means comprises a bias circuit 2 for controlling the discharge current based on constant current.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 13, 2006
    Inventor: Yuichi Matsushita
  • Publication number: 20050195020
    Abstract: A voltage regulator has a reference voltage generator that outputs a reference voltage based on first and second electrical source voltages, an output circuit which generates a predetermined direct-current voltage based on the reference voltage and generates a comparison voltage lower than the predetermined direct-current voltage, and a differential amplifier coupled between the reference voltage generator and the output circuit. The differential amplifier provides a control voltage to the output circuit responsive to a difference between the reference and comparison voltages. The voltage regulator has a voltage adjustment circuit that adjusts the reference voltage responsive to a variation in the first electrical source voltage. The differential amplifier may include a constant-current circuit and an operation current generating circuit.
    Type: Application
    Filed: February 25, 2005
    Publication date: September 8, 2005
    Inventor: Yuichi Matsushita
  • Patent number: 6911852
    Abstract: A start-up circuit includes a power supply node which receives a power supply voltage, a ground node which receives a ground voltage, a first node, a first capacitor which is coupled between the first node and the ground node, a supply circuit which is coupled between the power supply node and the first node, and which supplies an electrical charge from the power supply node to the first capacitor, a discharge circuit which is coupled between the first node and the ground node, and which discharges an electrical charge stored in the first capacitor to the ground node, and an output circuit which is connected to the first node, and which outputs a start-up signal when a voltage level of the first node becomes higher than a set voltage level.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: June 28, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yuichi Matsushita
  • Publication number: 20040135558
    Abstract: A start-up circuit includes a power supply node which receives a power supply voltage, a ground node which receives a ground voltage, a first node, a first capacitor which is coupled between the first node and the ground node, a supply circuit which is coupled between the power supply node and the first node, and which supplies an electrical charge from the power supply node to the first capacitor, a discharge circuit which is coupled between the first node and the ground node, and which discharges an electrical charge stored in the first capacitor to the ground node, and an output circuit which is connected to the first node, and which outputs a start-up signal when a voltage level of the first node becomes higher than a set voltage level.
    Type: Application
    Filed: December 29, 2003
    Publication date: July 15, 2004
    Inventor: Yuichi Matsushita
  • Patent number: 6693471
    Abstract: A start-up circuit includes a power supply node which receives a power supply voltage, a ground node which receives a ground voltage, a first node, a first capacitor which is coupled between the first node and the ground node, a supply circuit which is coupled between the power supply node and the first node, and which supplies an electrical charge from the power supply node to the first capacitor, a discharge circuit which is coupled between the first node and the ground node, and which discharges an electrical charge stored in the first capacitor to the ground node, and an output circuit which is connected to the first node, and which outputs a start-up signal when a voltage level of the first node becomes higher than a set voltage level.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: February 17, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yuichi Matsushita
  • Publication number: 20030058012
    Abstract: A start-up circuit includes a power supply node which receives a power supply voltage, a ground node which receives a ground voltage, a first node, a first capacitor which is coupled between the first node and the ground node, a supply circuit which is coupled between the power supply node and the first node, and which supplies an electrical charge from the power supply node to the first capacitor, a discharge circuit which is coupled between the first node and the ground node, and which discharges an electrical charge stored in the first capacitor to the ground node, and an output circuit which is connected to the first node, and which outputs a start-up signal when a voltage level of the first node becomes higher than a set voltage level.
    Type: Application
    Filed: September 24, 2002
    Publication date: March 27, 2003
    Inventor: Yuichi Matsushita
  • Patent number: 6333894
    Abstract: The present invention implements a decrease in chip size. The device is comprised of memory cell arrays 34a and 34b, a bank selector 36, a cell select circuit 38a, a data multiplexer 40, and an input/output buffer 42. The bank selector generates a bank select signal and selects the memory cell arrays alternately. The cell select circuit selects a predetermined memory cell of the memory cell array selected by the bank select signal and performs a read operation from and a write operation to this memory cell. The data multiplexer transfers the read data from the memory cell array selected by the bank select signal to the input/output buffer.
    Type: Grant
    Filed: September 8, 2000
    Date of Patent: December 25, 2001
    Assignee: Oki Electric Industry, Co., Ltd.
    Inventors: Akira Nakayama, Yuichi Matsushita