Abstract: There is provided an integrator including: a first order delay unit which outputs an output signal obtained by delaying a signal in accordance with an input signal; a first feedback unit which generates a first feedback signal in accordance with the output signal; a second feedback unit which generates a second feedback signal in accordance with the output signal; an addition and subtraction unit which adds and subtracts the first feedback signal and the second feedback signal, respectively, to and from the input signal, for an input to the delay unit; and a control unit which causes the second feedback unit to operate as a delay circuit during the first period, and causes the second feedback unit to operate as a gain circuit having a gain smaller than 0 during the second period.

Abstract: Provided is a delta-sigma AD converter including a delta-sigma modulating section that outputs a digital signal obtained by performing delta-sigma modulation with an oversampling ratio on an input analog signal; a digital filtering section that filters the digital signal with the oversampling ratio; a control terminal into which an external control signal is input; an output control section that performs control to output an output signal based on the filtered digital signal, according to the external control signal; and a setting section that sets the oversampling ratio based on interval information of the external control signal.

Abstract: Provided is a delta-sigma AD converter including a delta-sigma modulating section that outputs a digital signal obtained by performing delta-sigma modulation with an oversampling ratio on an input analog signal; a digital filtering section that filters the digital signal with the oversampling ratio; a control terminal into which an external control signal is input; an output control section that performs control to output an output signal based on the filtered digital signal, according to the external control signal; and a setting section that sets the oversampling ratio based on interval information of the external control signal.

Abstract: Provided is a delta-sigma AD converter including a delta-sigma modulating section that outputs a digital signal obtained by performing delta-sigma modulation with an oversampling ratio on an input analog signal; a digital filtering section that filters the digital signal with the oversampling ratio; a control terminal into which an external control signal is input; an output control section that performs control to output an output signal based on the filtered digital signal, according to the external control signal; and a setting section that sets the oversampling ratio based on interval information of the external control signal.

Abstract: Provided is a delta-sigma AD converter including a delta-sigma modulating section that outputs a digital signal obtained by performing delta-sigma modulation with an oversampling ratio on an input analog signal; a digital filtering section that filters the digital signal with the oversampling ratio; a control terminal into which an external control signal is input; an output control section that performs control to output an output signal based on the filtered digital signal, according to the external control signal; and a setting section that sets the oversampling ratio based on interval information of the external control signal.

Abstract: An A/D converter includes an incremental delta-sigma A/D modulator and a digital operation unit to which a signal from the A/D modulator is input. The A/D modulator includes an analog integrator configured to integrate input signals, a quantizer configured to quantize output signals of the analog integrator, a D/A converter configured to D/A convert an output of the quantizer, and a reset signal output device configured to reset the analog integrator and the digital operation unit. The analog integrator includes plural switched capacitors and a first analog integrator connected to the switched capacitors. The first analog integrator includes an operational amplifier connected to the switched capacitors and a feedback capacitor each connecting an input and an output of the operational amplifier.

Abstract: An A/D converter includes an incremental delta-sigma A/D modulator and a digital operation unit to which a signal from the A/D modulator is input. The A/D modulator includes an analog integrator configured to integrate input signals, a quantizer configured to quantize output signals of the analog integrator, a D/A converter configured to D/A convert an output of the quantizer, and a reset signal output device configured to reset the analog integrator and the digital operation unit. The analog integrator includes plural switched capacitors and a first analog integrator connected to the switched capacitors. The first analog integrator includes an operational amplifier connected to the switched capacitors and a feedback capacitor each connecting an input and an output of the operational amplifier.

Abstract: There is provided a pipelined A/D converter in which plural stages Stage 1 to Stage N each including an MDAC (i.e., Multiplying DA Converter) are connected. The pipelined A/D converter is configured with a Gain-AMP (12) included in the MDAC for the SPM, MOS transistors (Mx1) and (Mx2) as a differential pair having output ends connected to a sampling capacitor CsI on a subsequent stage, MOS transistors (My1) and (My2) as a load unit connected to the differential pair, a current source (I3) configured to supply a current to the MOS transistors (Mx1) and (Mx2) as the differential pair, and current sources (I1) and (I2) configured to adjust the current flown across the MOS transistors (My1) and (My2) as the load unit.

Abstract: There is provided a pipelined A/D converter in which plural stages Stage 1 to Stage N each including an MDAC (i.e., Multiplying DA Converter) are connected. The pipelined A/D converter is configured with a Gain-AMP (12) included in the MDAC for the SPM, MOS transistors (Mx1) and (Mx2) as a differential pair having output ends connected to a sampling capacitor CsI on a subsequent stage, MOS transistors (My1) and (My2) as a load unit connected to the differential pair, a current source (I3) configured to supply a current to the MOS transistors (Mx1) and (Mx2) as the differential pair, and current sources (I1) and (I2) configured to adjust the current flown across the MOS transistors (My1) and (My2) as the load unit.

Abstract: A method and apparatus for producing crystals by the Czochralski method whereby the thermal history during crystal growth according to the CZ method can be controlled with ease and accuracy. The apparatus comprises a crucible for receiving a raw material, a heater for heating and melting the raw material, and a heat insulating cylinder disposed so as to surround the crucible and the heater, wherein a portion of the heat insulating cylinder that is located above an upper end of the heater is so configured that its inner diameter is larger than the outer diameter of the heater at its lower end, and that its inner diameter at its upper end is equal to or less than the inner diameter of the heater while its outer diameter is equal to or greater than the outer diameter of the heater. This apparatus is used to produce crystals and to control the temperature distribution inside the crystal producing apparatus or the thermal history of crystals.

Abstract: An imaging device for imaging an object is situated above the object. A downward-illumination device for emitting light to the object is situated as one unit with the imaging device. A background-illumination device for emitting light to the object is situated below the object. An image obtained by the imaging device is stored in a memory unit of an image processing apparatus. The image processing apparatus includes a processing unit for logically processing the image. The illumination devices are connected to power supplies. The image processing apparatus and the power supplies are controlled by a controller. Thus, a bonding position is recognized easily with simple structure, the reliability of test results is enhanced, and the cost for testing is reduced by a decrease in the processing time.

Abstract: A wire bonding inspecting apparatus for inspecting wires bonded between a semiconductor chip and leads comprises an imaging device for optically taking an image of the wire and converting the optical image into electric image signals; a moving device for moving the imaging device; an image processing inspecting unit for obtaining wire positional coordinates on the basis of image signals and inspecting the wire on the basis of the positional coordinates; and a main controller.

Abstract: Wire bonding inspection equipment includes a judging unit for judging whether or not wire bonding of a semiconductor device is acceptabe and for producing a defect signal when the semiconductor device is judged to be defective. In response to the defect signal wires of the defective semiconductor device are broken by a breaking unit, and a defect mark is applied on the defective semiconductor device by a defective mark putting unit in response to the defect signal, the defect mark applying unit applying the defect mark on an area other than an area to be covered with sealing material.

Abstract: This invention relates to a mechanical pencil capable of utilizing effectively a writing lead and having an improved lead protection pipe. A protuberance having a surface having a hardness equal to, or higher than, that of a lead is formed on the inner surface of the lead protection pipe by dispersing and depositing powder; very small coil-like fibers having a surface having hardness equal to, or higher than, that of the lead are dispersed and deposited on the inner surface of the lead protection pipe through a base material; an inorganic film having a protuberance having hardness equal to, or higher than, that of the lead is formed on the inner surface of the lead protection pipe; or a ring-like lead retaining member is disposed inside the lead protection pipe. The lead retaining member has a treated portion having a surface having hardness equal to, or higher than, that of the lead, and a partial play relative to the inner surface of the lead protection pipe.