Abstract: Provided is a test apparatus for testing the jitter tolerance of a device under test which receives a data signal and a strobe signal indicating the timing at which the data signal should be received, and acquires the data signal at the timing indicated by the strobe signal, including a signal generating section which generates the data signal and the strobe signal to be supplied to the device under test, a jitter applying section which applies a combinational jitter obtained by combining a data jitter which should be tolerated for the data signal and a strobe jitter which should be tolerated for the strobe signal to the data signal or the strobe signal, and a signal supplying section which supplies the data signal and the strobe signal, to one of which the combinational jitter has been applied, to the device under test.

Abstract: An oscillating apparatus is provided that includes: an integration circuit that outputs a control signal based on an integration value of two inputted voltage values; an oscillator that outputs an oscillation signal of a frequency that is based on the control signal; a phase comparator that outputs a phase difference signal of a pulse width that is in accordance with a phase difference between the oscillation signal and the reference signal, by comparing the oscillation signal with a reference signal of a predetermined frequency; a controlling circuits that controls the two inputted voltage values based on the phase difference signal, so as to approximate a phase difference between the oscillation signal and the reference signal to a predetermined reference phase difference; and a voltage stabilizing current that defines the two inputted voltages based on a predetermined reference voltage.

Abstract: Provided is a test apparatus for testing the jitter tolerance of a device under test which receives a data signal and a strobe signal indicating the timing at which the data signal should be received, and acquires the data signal at the timing indicated by the strobe signal, including a signal generating section which generates the data signal and the strobe signal to be supplied to the device under test, a jitter applying section which applies a combinational jitter obtained by combining a data jitter which should be tolerated for the data signal and a strobe jitter which should be tolerated for the strobe signal to the data signal or the strobe signal, and a signal supplying section which supplies the data signal and the strobe signal, to one of which the combinational jitter has been applied, to the device under test.

Abstract: An oscillating apparatus is provided that includes: a filter circuit that includes a capacitor and outputs a control signal based on an amount of charge accumulated in the capacitor; an oscillator that outputs an oscillation signal of a frequency that is based on the control signal; a phase comparator that compares the oscillation signal with a reference signal of a predetermined frequency, to detect a phase difference between the oscillation signal and the reference signal; a switch circuit that controls whether to charge the capacitor according to a predetermined charge current or to discharge the capacitor according to a predetermined discharge current, based on the phase difference; and a current stabilizing current that defines each of the charge current and the discharge current based on a predetermined reference current or a reference voltage.

Abstract: There is provided a jitter applying circuit that includes: a signal transmission path that transmits a signal from an input end to an output end thereof; a jitter control section that outputs, from an output terminal thereof, a jitter control voltage that is in accordance with jitter to be superposed to a signal propagating on the signal transmission path; a buffer circuit that is serially connected between the input end and the connection point on the signal transmission path; a serial resistance that is serially connected between the buffer circuit and the connection point, on the signal transmission path; and a variable capacitance diode that is provided between a connection point on the signal transmission path and the output terminal of the jitter control section, and whose capacitance changes in accordance with the jitter control voltage.

Abstract: An oscillating apparatus is provided that includes: an integration circuit that outputs a control signal based on an integration value of two inputted voltage values; an oscillator that outputs an oscillation signal of a frequency that is based on the control signal; a phase comparator that outputs a phase difference signal of a pulse width that is in accordance with a phase difference between the oscillation signal and the reference signal, by comparing the oscillation signal with a reference signal of a predetermined frequency; a controlling circuits that controls the two inputted voltage values based on the phase difference signal, so as to approximate a phase difference between the oscillation signal and the reference signal to a predetermined reference phase difference; and a voltage stabilizing current that defines the two inputted voltages based on a predetermined reference voltage.

Abstract: An oscillating apparatus is provided that includes: a filter circuit that includes a capacitor and outputs a control signal based on an amount of charge accumulated in the capacitor; an oscillator that outputs an oscillation signal of a frequency that is based on the control signal; a phase comparator that compares the oscillation signal with a reference signal of a predetermined frequency, to detect a phase difference between the oscillation signal and the reference signal; a switch circuit that controls whether to charge the capacitor according to a predetermined charge current or to discharge the capacitor according to a predetermined discharge current, based on the phase difference; and a current stabilizing current that defines each of the charge current and the discharge current based on a predetermined reference current or a reference voltage.

Abstract: There is provided a jitter application circuit for generating a clock signal containing a phase jitter component corresponding to given jitter data, having a PLL circuit for generating an oscillating signal corresponding to a given reference signal, a variable delay circuit for outputting said clock signal in which said oscillating signal is delayed, a low-frequency application section for applying low-frequency component of said phase jitter component to said oscillating signal by controlling oscillation frequency of said PLL circuit based on the low-frequency component of said jitter data and a high-frequency application section for applying high-frequency component of said phase jitter component to said clock signal by controlling a delay in said variable delay circuit based on the high-frequency component of said jitter data.

Abstract: There is provided a jitter application circuit for generating a clock signal containing a phase jitter component corresponding to given jitter data, having a PLL circuit for generating an oscillating signal corresponding to a given reference signal, a variable delay circuit for outputting said clock signal in which said oscillating signal is delayed, a low-frequency application section for applying low-frequency component of said phase jitter component to said oscillating signal by controlling oscillation frequency of said PLL circuit based on the low-frequency component of said jitter data and a high-frequency application section for applying high-frequency component of said phase jitter component to said clock signal by controlling a delay in said variable delay circuit based on the high-frequency component of said jitter data.

Abstract: A signal to be measured is waveform-formatted to a square waveform that retains the frequency, duty ratio and jitter component of the original signal, and the leading (or trailing) edge of the waveform-formatted output is sampled by a sampling clock of a frequency slightly different from 1/N of the frequency fM of the signal to be measured. The samples are converted by an A/D converter to digital data Vn(t), which is stored in a memory. The difference between the stored digital data Vn(t) and the rise-up characteristic line V′(t) is calculated to detect jitter J′n(t).

Abstract: A signal to be measured is waveform-formatted to a square waveform that retains the frequency, duty ratio and jitter component of the original signal, and the leading (or trailing) edge of the waveform-formatted output is sampled by a sampling clock of a frequency slightly different from 1/N of the frequency fM of the signal to be measured. The samples are converted by an A/D converter to digital data Vn(t), which is stored in a memory. The difference between the stored digital data Vn(t) and the rise-up characteristic line V′(t) is calculated to detect jitter J′n(t).