Patents by Inventor Yuichi Morita
Yuichi Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7589388Abstract: The invention is directed to providing a package type semiconductor device with high reliability and smaller size and a method of manufacturing the same. A semiconductor substrate formed with a device element and a pad electrode on its front surface is prepared. The semiconductor substrate is then selectively etched from its back surface to form an opening. A second insulation film is then formed covering the side and back surfaces of the semiconductor substrate. First and second insulation films on the bottom of the opening are then selectively removed to expose a portion of the pad electrode. A wiring layer is then formed along the side surface of the semiconductor substrate, being electrically connected with the exposed pad electrode. An electrode connect layer is then formed covering the wiring layer. A protection layer is then formed covering the back surface of the semiconductor substrate and having an opening in a region for formation of a sidewall electrode.Type: GrantFiled: October 19, 2007Date of Patent: September 15, 2009Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Yuichi Morita, Takashi Noma, Hiroyuki Shinogi, Shinzo Ishibe, Katsuhiko Kitagawa, Noboru Okubo, Kazuo Okada, Hiroshi Yamada
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Publication number: 20090206349Abstract: An object of the invention is to provide a smaller semiconductor device of which the manufacturing process is simplified and the manufacturing cost is reduced and a method of manufacturing the same. Furthermore, an object of the invention is to provide a semiconductor device having a cavity. A first supporting body 5 having a penetration hole 6 penetrating it from the front surface to the back surface is attached to a front surface of a semiconductor substrate 2 with an adhesive layer 4 being interposed therebetween. A device element 1 and wiring layers 3 are formed on the front surface of the semiconductor substrate 2. A second supporting body 7 is attached to the first supporting body 5 with an adhesive layer 8 being interposed therebetween so as to cover the penetration hole 6. The device element 1 is sealed in a cavity 9 surrounded by the semiconductor substrate 2, the first supporting body 5 and the second supporting body 7.Type: ApplicationFiled: August 22, 2007Publication date: August 20, 2009Inventors: Hiroshi Yamada, Katsuhiko Kitagawa, Kazuo Okada, Yuichi Morita, Hiroyuki Shinogi, Shinzo Ishibe, Yoshinori Seki, Takashi Noma
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Patent number: 7575994Abstract: The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate, a first passivation film covering an end portion of the pad electrode and having a first opening on the pad electrode, a plating layer formed on the pad electrode in the first opening, a second passivation film covering an exposed portion of the pad electrode between an end portion of the first passivation film and the plating layer, covering an end portion of the plating layer, and having a second opening on the plating layer, and a conductive terminal formed on the plating layer in the second opening.Type: GrantFiled: June 13, 2006Date of Patent: August 18, 2009Assignee: SANYO Electric Co., Ltd.Inventors: Yuichi Morita, Shinzo Ishibe, Takashi Noma, Hisao Otsuka, Yukihiro Takao, Hiroshi Kanamori
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Patent number: 7508072Abstract: The invention prevents a pad electrode for external connection of a semiconductor device from being damaged. An electronic circuit, a first pad electrode connected to the electronic circuit, and a second pad electrode connected to the first pad electrode are formed on a semiconductor substrate. A first protection film is formed, covering the first pad electrode and having an opening on the second pad electrode only. A wiring layer is further formed, being connected to the back surface of the first pad electrode through a via hole penetrating the semiconductor substrate and extending from the via hole onto the back surface of the semiconductor substrate.Type: GrantFiled: September 29, 2006Date of Patent: March 24, 2009Assignee: Sanyo Electric Co., Ltd.Inventors: Yuichi Morita, Shinzo Ishibe, Takashi Noma, Hisao Otsuka, Yukihiro Takao, Hiroshi Kanamori
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Publication number: 20080128914Abstract: The invention is directed to providing a package type semiconductor device with high reliability and smaller size and a method of manufacturing the same. A semiconductor substrate formed with a device element and a pad electrode on its front surface is prepared. The semiconductor substrate is then selectively etched from its back surface to form an opening. A second insulation film is then formed covering the side and back surfaces of the semiconductor substrate. First and second insulation films on the bottom of the opening are then selectively removed to expose a portion of the pad electrode. A wiring layer is then formed along the side surface of the semiconductor substrate, being electrically connected with the exposed pad electrode. An electrode connect layer is then formed covering the wiring layer. A protection layer is then formed covering the back surface of the semiconductor substrate and having an opening in a region for formation of a sidewall electrode.Type: ApplicationFiled: October 19, 2007Publication date: June 5, 2008Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Yuichi MORITA, Takashi NOMA, Hiroyuki SHINOGI, Shinzo ISHIBE, Katsuhiko KITAGAWA, Noboru OKUBO, Kazuo OKADA, Hiroshi YAMADA
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Publication number: 20070210437Abstract: A packaged semiconductor device is manufactured by a simplified manufacturing process, and is reduced in cost, in thickness and in size. A device component and a pad electrode connected with the device component are formed on a semiconductor substrate. A supporter is bonded to a top surface of the semiconductor substrate through an adhesive layer. Then, there is formed a protection layer that has an opening at a location corresponding to the pad electrode and covers a side surface and a back surface of the semiconductor substrate. A conductive terminal is formed on the pad electrode at the location corresponding to the opening formed in the protection layer. No wiring layer or conductive terminal is formed on the back surface of the semiconductor substrate. A conductive terminal is formed on a periphery of the supporter outside of and next to the side surface of the semiconductor substrate.Type: ApplicationFiled: March 7, 2007Publication date: September 13, 2007Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.Inventors: Takashi Noma, Shigeki Otsuka, Yuichi Morita, Kazuo Okada, Hiroshi Yamada, Katsuhiko Kitagawa, Noboru Okubo, Shinzo Ishibe, Hiroyuki Shinogi
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Publication number: 20070145420Abstract: The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.Type: ApplicationFiled: December 15, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kazuo Okada, Katsuhiko Kitagawa, Takashi Noma, Shigeki Otsuka, Hiroshi Yamada, Shinzo Ishibe, Yuichi Morita, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
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Publication number: 20070145590Abstract: This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.Type: ApplicationFiled: December 15, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Takashi Noma, Kazuo Okada, Shinzo Ishibe, Katsuhiko Kitagawa, Yuichi Morita, Shigeki Otsuka, Hiroshi Yamada, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
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Publication number: 20070075425Abstract: The invention prevents a pad electrode for external connection of a semiconductor device from being damaged. An electronic circuit, a first pad electrode connected to the electronic circuit, and a second pad electrode connected to the first pad electrode are formed on a semiconductor substrate. A first protection film is formed, covering the first pad electrode and having an opening on the second pad electrode only. A wiring layer is further formed, being connected to the back surface of the first pad electrode through a via hole penetrating the semiconductor substrate and extending from the via hole onto the back surface of the semiconductor substrate.Type: ApplicationFiled: September 29, 2006Publication date: April 5, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yuichi Morita, Shinzo Ishibe, Takashi Noma, Hisao Otsuka, Yukihiro Takao, Hiroshi Kanamori
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Publication number: 20070001302Abstract: The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate, a first passivation film covering an end portion of the pad electrode and having a first opening on the pad electrode, a plating layer formed on the pad electrode in the first opening, a second passivation film covering an exposed portion of the pad electrode between an end portion of the first passivation film and the plating layer, covering an end portion of the plating layer, and having a second opening on the plating layer, and a conductive terminal formed on the plating layer in the second opening.Type: ApplicationFiled: June 13, 2006Publication date: January 4, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yuichi Morita, Shinzo Ishibe, Takashi Noma, Hisao Otsuka, Yukihiro Takao, Hiroshi Kanamori
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Publication number: 20060289991Abstract: The invention provides a CSP type semiconductor device with high reliability. The semiconductor device includes a pad electrode formed on a semiconductor substrate with insulation films interposed therebetween, a plating layer formed on the pad electrode, a conductive terminal formed on the plating layer and electrically connected with the pad electrode, and a first passivation film covering the insulation films and a side end portion of the pad electrode, in which an exposed portion of the pad electrode that causes corrosion is covered by forming a second passivation film so as to cover the first passivation film, the plating layer, and a portion of a sidewall of the conductive terminal.Type: ApplicationFiled: June 13, 2006Publication date: December 28, 2006Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yuichi Morita, Shinzo Ishibe, Takashi Noma, Hisao Otsuka, Yukihiro Takao, Hiroshi Kanamori
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Patent number: 7123886Abstract: In a handheld mobile phone (10) having a detachable battery pack (20) which can be removably mounted to a body (11) of the handheld mobile phone, the detachable battery pack has a memory card receiving recess (22) for removably receiving a body of a memory card (30), and the body of the handheld mobile phone has a plurality of contacts (15) which are brought into electrical contact with contact terminals (31) of the memory card mounted to the detachable battery pack when the detachable battery pack is mounted to the body of the handheld mobile phone.Type: GrantFiled: April 26, 2002Date of Patent: October 17, 2006Assignee: NEC CorporationInventor: Yuichi Morita
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Publication number: 20060180933Abstract: The invention is directed to prevent corrosion of a semiconductor device. In the semiconductor device manufacturing method of the invention, a semiconductor substrate is etched from its back surface in a position corresponding to a first wiring formed on the semiconductor substrate with a first insulation film therebetween, to form a first opening exposing the first insulation film. Next, the insulation film exposed in the first opening is etched to form a second opening exposing the first wiring, and then the semiconductor substrate is etched to increase a diameter of the first opening and form a first opening having the larger diameter. Then, a second insulation film is formed on the back surface of the semiconductor substrate including on the first wiring through the first and second openings, and then the second insulation film covering the first wiring is etched.Type: ApplicationFiled: January 27, 2006Publication date: August 17, 2006Applicant: SANYO ELECTRIC CO., LTDInventors: Hiroshi Kanamori, Shigeki Otsuka, Yuichi Morita, Akira Suzuki
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Patent number: 6954653Abstract: Disclosed is a cellular phone having a card connector composed of a first slot for inserting a first IC card and a second slot for inserting a second IC card. The second slot is disposed above said first slot so that the inserting direction of said first IC card and the inserting direction of said second IC card are mutually in vertical relation.Type: GrantFiled: March 6, 2001Date of Patent: October 11, 2005Assignee: NEC CorporationInventor: Yuichi Morita
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Patent number: 6680459Abstract: A laser beam machining apparatus forms blind holes at predetermined intervals in a workpiece by intermittently irradiating a laser beam from a laser nozzle to the workpiece while the laser nozzle and the workpiece being moved relatively. During the time the workpiece is subjected to machining, the electrostatic capacity between the support member and the laser nozzle is detected by an electrostatic capacity sensor while the workpiece made of conductive material is supported on the support member. The irradiation output power is controlled by a control unit which operates to vary the number of output pulses from the laser nozzle each time one hole is formed according to the result detected in response to variation in the thickness of the workpiece.Type: GrantFiled: June 21, 2002Date of Patent: January 20, 2004Assignee: Nippei Toyama CorporationInventors: Shuso Kanaya, Yuichi Morita
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Publication number: 20030000927Abstract: A laser beam machining apparatus forms blind holes at predetermined intervals in a workpiece by intermittently irradiating a laser beam from a laser nozzle to the workpiece while the laser nozzle and the workpiece being moved relatively. During the time the workpiece is subjected to machining, the electrostatic capacity between the support member and the laser nozzle is detected by an electrostatic capacity sensor while the workpiece made of conductive material is supported on the support member. The irradiation output power is controlled by a control unit which operates to vary the number of output pulses from the laser nozzle each time one hole is formed according to the result detected in response to variation in the thickness of the workpiece.Type: ApplicationFiled: June 21, 2002Publication date: January 2, 2003Applicant: NIPPEI TOYAMA CORPORATIONInventors: Shuso Kanaya, Yuichi Morita
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Publication number: 20020160728Abstract: In a handheld mobile phone (10) having a detachable battery pack (20) which can be removably mounted to a body (11) of the handheld mobile phone, the detachable battery pack has a memory card receiving recess (22) for removably receiving a body of a memory card (30), and the body of the handheld mobile phone has a plurality of contacts (15) which are brought into electrical contact with contact terminals (31) of the memory card mounted to the detachable battery pack when the detachable battery pack is mounted to the body of the handheld mobile phone.Type: ApplicationFiled: April 26, 2002Publication date: October 31, 2002Inventor: Yuichi Morita
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Patent number: 6440602Abstract: Even when an ambient temperature of a battery housed in a battery pack is detrimentally low, the battery is capable of performing its normal discharge operation, and thereby preventing the available period of time of an electronic device powered by the battery from decreasing due to such detrimentally low ambient temperature.Type: GrantFiled: February 8, 2000Date of Patent: August 27, 2002Assignee: NEC CorporationInventor: Yuichi Morita
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Patent number: 6323758Abstract: A vibration generating unit of the present invention includes a magnetic field generating device including a magnetic field generating section for generating a magnetic field in response to a voltage applied thereto and a voltage source for applying the voltage to the magnetic field generating section. A vibrator includes a fulcrum portion and a pair of magnetized portions positioned at opposite sides of the fulcrum portion. The magnetized portions are movable about the fulcrum portion in a seesaw fashion in response to the magnetic field generated by the magnetic field generating section.Type: GrantFiled: November 19, 1999Date of Patent: November 27, 2001Assignee: NEC CorporationInventor: Yuichi Morita
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Publication number: 20010021657Abstract: Disclosed is a cellular phone having a card connector composed of a first slot for inserting a first IC card and a second slot for inserting a second IC card. The second slot is disposed above said first slot so that the inserting direction of said first IC card and the inserting direction of said second IC card are mutually in vertical relation.Type: ApplicationFiled: March 6, 2001Publication date: September 13, 2001Inventor: Yuichi Morita