Abstract: Provided is a block compactor equipped with a brake mechanism capable of securely locking rollers with a simple structure and stably maintaining a locked state and an unlocked state even when exposed to vibration. A brake pad 12 is fixed to a lower end portion of a brake shaft 11 and is configured to be rotatable together with the brake shaft 11 between two rollers 5 adjacent in the front and rear. By rotating a brake lever 13, the brake pad 12 can be switched between an unlocked state in which the brake pad 12 does not contact with the outer circumferential surfaces of the rollers 5, and the rollers 5 are free to rotate, and a locked state in which the brake pad 12 contacts with the outer circumferential surfaces of the rollers 5, and the rollers 5 cannot rotate with the friction force.

Abstract: A flexible connector comprises a first plurality of pads disposed within an integrated circuit (IC) area, a second plurality of pads disposed in the IC area, and a plurality of through holes disposed in the IC area. The flexible connector further comprises first wiring coupled to the plurality of through holes and the first plurality of pads, and a rigidity element at least partially disposed between the plurality of through holes and the second plurality of pads.

Abstract: An integrated circuit (IC) chip comprises a plurality of pads and a plurality of bumps. The plurality of pads includes a first pad. The plurality of bumps is disposed on the plurality of pads. The plurality of bumps includes a first bump disposed on the first pad. The first bump as a width that is different than an exposed with of the first pad. The center of the first bump is not aligned with a center of the first pad.

Abstract: An integrated circuit device comprises: a resin film that is flexible; a plurality of traces bonded on a surface of the resin film and arrayed in a specific direction; an IC chip bonded on the surface of the resin film, located offset to the traces in a direction perpendicular to the specific direction, and connected to the traces; and a protection pattern formed on the surface of the resin film, located in the specific direction with respect to a disposition region in which the IC chip and/or the traces are disposed, and formed of the same material as that of the traces.

Abstract: A semiconductor device comprises a semiconductor substrate, a connection pad, and a bump. The connection pad is connected to the bump and disposed between the semiconductor substrate and the bump. The connection pad has one or more slits.

Abstract: An integrated circuit (IC) chip comprises a plurality of pads and a plurality of bumps. The plurality of pads includes a first pad. The plurality of bumps is disposed on the plurality of pads. The plurality of bumps includes a first bump disposed on the first pad. The first bump as a width that is different than an exposed with of the first pad. The center of the first bump is not aligned with a center of the first pad.

Abstract: An integrated circuit device comprises: a resin film that is flexible; a plurality of traces bonded on a surface of the resin film and arrayed in a specific direction; an IC chip bonded on the surface of the resin film, located offset to the traces in a direction perpendicular to the specific direction, and connected to the traces; and a protection pattern formed on the surface of the resin film, located in the specific direction with respect to a disposition region in which the IC chip and/or the traces are disposed, and formed of the same material as that of the traces.

Abstract: A flexible connector comprises a first plurality of pads disposed within an integrated circuit (IC) area, a second plurality of pads disposed in the IC area, and a plurality of through holes disposed in the IC area. The flexible connector further comprises first wiring coupled to the plurality of through holes and the first plurality of pads, and a rigidity element at least partially disposed between the plurality of through holes and the second plurality of pads.

Abstract: A semiconductor wafer includes circuit integration regions each incorporating an integrated circuit and guard rings disposed to surround the circuit integration regions, respectively. A scribe region disposed between every adjacent two of the guard rings. An element and a pad electrically connected to the element are disposed in the scribe region. A groove is disposed along a corresponding guard ring on a front surface of the semiconductor wafer between the pad and the corresponding guard ring. The distance between the groove and the pad is varied along the corresponding guard ring.

Abstract: A semiconductor device includes: a semiconductor chip having a main face which has a pair of long sides parallel to each other and a pair of short sides orthogonal to the pair of long sides; first bumps arrayed in a first bump placement region of the semiconductor chip, the first bump placement region being positioned along one of the pair of long sides; second bumps arrayed in a second bump placement region of the semiconductor chip, the second bump placement region being positioned along the other of the pair of long sides; first power lines disposed in a region between the first bump placement region and the second bump placement region, the first power lines extending in a direction parallel to the pair of long sides; and third bumps integrated on the semiconductor chip. Each of the third bumps provides short-circuiting of the first power lines.

Abstract: A semiconductor wafer includes circuit integration regions each incorporating an integrated circuit and guard rings disposed to surround the circuit integration regions, respectively. A scribe region disposed between every adjacent two of the guard rings. An element and a pad electrically connected to the element are disposed in the scribe region. A groove is disposed along a corresponding guard ring on a front surface of the semiconductor wafer between the pad and the corresponding guard ring. The distance between the groove and the pad is varied along the corresponding guard ring.

Abstract: A semiconductor device includes: a semiconductor chip having a main face which has a pair of long sides parallel to each other and a pair of short sides orthogonal to the pair of long sides; first bumps arrayed in a first bump placement region of the semiconductor chip, the first bump placement region being positioned along one of the pair of long sides; second bumps arrayed in a second bump placement region of the semiconductor chip, the second bump placement region being positioned along the other of the pair of long sides; first power lines disposed in a region between the first bump placement region and the second bump placement region, the first power lines extending in a direction parallel to the pair of long sides; and third bumps integrated on the semiconductor chip. Each of the third bumps provides short-circuiting of the first power lines.