Patents by Inventor Yuichi NOGE

Yuichi NOGE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12170477
    Abstract: A power conversion device includes two lower arm switching elements connected in parallel to each other and a lower arm driver circuit that drives the two lower arm switching elements. The two lower arm switching elements respectively include gate terminals and detection terminals used to detect counter-electromotive forces. The power conversion device includes a common connection line that connects the two detection terminals to each other and connects the two detection terminals to an addition circuit of the lower arm driver circuit. A combined electromotive force is transmitted via the common connection line.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: December 17, 2024
    Assignee: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shuhei Aoyama, Yoshiaki Ishihara, Yuichi Noge
  • Publication number: 20230268819
    Abstract: A power conversion device includes two lower arm switching elements connected in parallel to each other and a lower arm driver circuit that drives the two lower arm switching elements. The two lower arm switching elements respectively include gate terminals and detection terminals used to detect counter-electromotive forces. The power conversion device includes a common connection line that connects the two detection terminals to each other and connects the two detection terminals to an addition circuit of the lower arm driver circuit. A combined electromotive force is transmitted via the common connection line.
    Type: Application
    Filed: April 28, 2021
    Publication date: August 24, 2023
    Applicant: KABUSHIKI KAISHA TOYOTA JIDOSHOKKI
    Inventors: Shuhei AOYAMA, Yoshiaki ISHIHARA, Yuichi NOGE
  • Patent number: 9013906
    Abstract: In a power-system-interconnected inverter device, PI control circuits obtain voltage correction values in directions reducing the current errors on the basis of current errors serving as differences between target current values and detection values. Multiplexers provide modulation circuits with voltage target values corrected by the voltage correction values being added to voltage detection values. The modulation circuits provide gate signals for switch elements in multilevel circuits. In addition, a sign circuit provides gate signals for switch elements in a bridge clamping circuit.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: April 21, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Junichi Itoh, Yuichi Noge
  • Patent number: 9001544
    Abstract: In an inverter device, a first three-level circuit includes first to fourth preceding-stage switch elements connected in series between a first input end and a ground and a first charging and discharging capacitor. A second three-level circuit includes fifth to eighth preceding-stage switch elements connected in series between a second input end and the ground and a second charging and discharging capacitor. The first and second two three-level circuits define a five-level circuit that is subjected to switching with the carrier frequency of PWM modulation. The output polarity of a subsequent-stage bridge clamping circuit is inverted between the anterior half cycle and the posterior half cycle of a power supply frequency.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: April 7, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Junichi Itoh, Yuichi Noge
  • Publication number: 20140063885
    Abstract: In a power-system-interconnected inverter device, PI control circuits obtain voltage correction values in directions reducing the current errors on the basis of current errors serving as differences between target current values and detection values. Multiplexers provide modulation circuits with voltage target values corrected by the voltage correction values being added to voltage detection values. The modulation circuits provide gate signals for switch elements in multilevel circuits. In addition, a sign circuit provides gate signals for switch elements in a bridge clamping circuit.
    Type: Application
    Filed: February 22, 2013
    Publication date: March 6, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Junichi ITOH, Yuichi NOGE
  • Publication number: 20140063884
    Abstract: In an inverter device, a first three-level circuit includes first to fourth preceding-stage switch elements connected in series between a first input end and a ground and a first charging and discharging capacitor. A second three-level circuit includes fifth to eighth preceding-stage switch elements connected in series between a second input end and the ground and a second charging and discharging capacitor. The first and second two three-level circuits define a five-level circuit that is subjected to switching with the carrier frequency of PWM modulation. The output polarity of a subsequent-stage bridge clamping circuit is inverted between the anterior half cycle and the posterior half cycle of a power supply frequency.
    Type: Application
    Filed: February 22, 2013
    Publication date: March 6, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Junichi ITOH, Yuichi NOGE