Patents by Inventor Yuichi OKOUCHI

Yuichi OKOUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10184975
    Abstract: A printed board with a wiring pattern for detecting deterioration includes an insulating substrate, a wiring pattern group that is formed on the insulating substrate and includes a wiring pattern for detecting deterioration; and a solder resist covering the wiring pattern group, in which the board has a thin film section, and a thick film section in which a thickness of the solder resist is larger than the thin film section, and the wiring pattern for detecting deterioration is formed in the thin film section whose entire surrounding area or partial surrounding area is surrounded by the thick film section.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: January 22, 2019
    Assignee: FANUC CORPORATION
    Inventors: Yuichi Okouchi, Norihiro Saido
  • Publication number: 20160227648
    Abstract: The width of a lead-terminal connection pad on a printed wiring board is not greater than the width of a lead terminal. Therefore, a wider space can be secured between adjacent solder joints, so that bridge failure can be suppressed. Further, the length of projection of the lead-terminal connection pad at the proximal portion of the lead terminal is shorter than that of a lead-terminal connection pad on a conventional printed wiring board. Thus, a solder pool at the proximal portion of the lead terminal can be reduced to suppress bridge defect.
    Type: Application
    Filed: February 2, 2016
    Publication date: August 4, 2016
    Inventors: Takeshi SAWADA, Yuichi OKOUCHI, Daisuke MIURA
  • Publication number: 20160091557
    Abstract: A printed board with a wiring pattern for detecting deterioration includes an insulating substrate, a wiring pattern group that is formed on the insulating substrate and includes a wiring pattern for detecting deterioration; and a solder resist covering the wiring pattern group, in which the board has a thin film section, and a thick film section in which a thickness of the solder resist is larger than the thin film section, and the wiring pattern for detecting deterioration is formed in the thin film section whose entire surrounding area or partial surrounding area is surrounded by the thick film section.
    Type: Application
    Filed: September 28, 2015
    Publication date: March 31, 2016
    Inventors: Yuichi OKOUCHI, Norihiro SAIDO
  • Publication number: 20150382456
    Abstract: A printed circuit board including a metal conductor formed on a surface of an insulating base material and having a component mounting portion, and a solder resist covering a part of the metal conductor, includes a thinned part on a component-mounting-portion side in the solder resist.
    Type: Application
    Filed: June 29, 2015
    Publication date: December 31, 2015
    Inventors: Norihiro SAIDOU, Yuichi OKOUCHI
  • Patent number: 8853561
    Abstract: A printed wiring board is configured such that copper-laminated plates and prepregs are alternately laminated and surface conductive layers are arranged on the outermost positions outside the prepregs, wherein all leading wires from pads for surface-mount parts to be mounted on the surface of the printed wiring board are connected to inner conductive layers of the copper laminated plates through blind via holes connecting the surface conductive layer and the copper-laminated plate therebelow, and inner via holes connecting conductive layers on the top and rear surfaces of at least one of the copper-laminated plates that is nearest to the surface conductive layer are provided and a conductive film is formed in the inner via holes.
    Type: Grant
    Filed: May 22, 2012
    Date of Patent: October 7, 2014
    Assignee: FANUC Corporation
    Inventor: Yuichi Okouchi
  • Publication number: 20120325531
    Abstract: A printed wiring board is configured such that copper-laminated plates and prepregs are alternately laminated and surface conductive layers are arranged on the outermost positions outside the prepregs, wherein all leading wires from pads for surface-mount parts to be mounted on the surface of the printed wiring board are connected to inner conductive layers of the copper laminated plates through blind via holes connecting the surface conductive layer and the copper-laminated plate therebelow, and inner via holes connecting conductive layers on the top and rear surfaces of at least one of the copper-laminated plates that is nearest to the surface conductive layer are provided and a conductive film is formed in the inner via holes.
    Type: Application
    Filed: May 22, 2012
    Publication date: December 27, 2012
    Applicant: FANUC CORPORATION
    Inventor: Yuichi OKOUCHI