Abstract: An element body includes a main surface and a pair of end surfaces. Each external electrode includes a conductive resin layer on the main surface. Each auxiliary internal electrode is disposed in the same layer as a corresponding internal electrode of a plurality of internal electrodes and is electrically connected to the external electrode to which the corresponding internal electrode is not electrically connected. Each auxiliary internal electrode includes first and second electrode portions. The first electrode portion is exposed to a corresponding end surface of the pair of end surfaces and is electrically and physically connected to the external electrode to which the corresponding internal electrode is not electrically connected. The second electrode portion is positioned between the conductive resin layer of the external electrode to which the corresponding internal electrode is not electrically connected and the corresponding internal electrode.

Abstract: The present invention relates to an integrated circuit comprising a semiconductor chip having thereon a logical function portion for realizing logical function and at least one power supply point for supplying electric power to the logical function portion, and at least one first, second and third power trunk line are arranged on the chip for supplying electric power from the power supply point to the logical function portion. The second power trunk line is disposed in an area in which the logical function portion of the chip is disposed. The first power trunk line is disposed between the power supply point and the second power trunk line to connect the second power trunk line with the power supply point. The third trunk line is connected at at least one end to the second trunk line and is disposed in the logical function portion for supplying electric power to the logical function portion.