Abstract: A semiconductor module includes: a base substrate that includes a first dielectric film and an electrode layer, the first dielectric film having a mounting surface, the mounting surface including a first mounting area and a second mounting area; a first semiconductor part mounted on the first mounting area; and a second semiconductor part mounted on the second mounting area, the second semiconductor part including a vertical power semiconductor device, a conductive block to be connected to the electrode layer, and a wiring substrate, the vertical power semiconductor device having a first surface and a second surface, the first surface including a first terminal to be connected to the electrode layer, the second surface including a second terminal, the wiring substrate electrically connecting the conductive block and the second terminal.

Abstract: A semiconductor module includes: a base substrate that includes a first dielectric film and an electrode layer, the first dielectric film having a mounting surface, the mounting surface including a first mounting area and a second mounting area; a first semiconductor part mounted on the first mounting area; and a second semiconductor part mounted on the second mounting area, the second semiconductor part including a vertical power semiconductor device, a conductive block to be connected to the electrode layer, and a wiring substrate, the vertical power semiconductor device having a first surface and a second surface, the first surface including a first terminal to be connected to the electrode layer, the second surface including a second terminal, the wiring substrate electrically connecting the conductive block and the second terminal.

Abstract: A semiconductor module includes: a dielectric film that has a first surface and a second surface opposed to the first surface, the first surface including a first mounting area and a second mounting area, the second surface including a first area and a second area, the first area facing the first mounting area, the second area facing the second mounting area; a plurality of circuit parts that includes a first circuit part and a second circuit part, the first circuit part being mounted on the first mounting area, the second circuit part being mounted on the second mounting area; a sealing layer that is provided on the first surface and covers the plurality of circuit parts; and an electrode layer that includes a first electrode group and a second electric group, the first electrode group including a plurality of first electrode terminals that covers substantially the entire area of the first area and is to be electrically connected to the first circuit part, the second electrode group including a plurality of

Abstract: A semiconductor module includes: a dielectric film that has a first surface and a second surface opposed to the first surface; a plurality of circuit parts mounted on the first surface; an electrode layer that is disposed on the second surface and includes a plurality of electrode portions to be electrically connected to the plurality of circuit parts, at least a part of the plurality of electrode portions including a base that is long in one axis direction; a rigid member that is disposed on the first surface, includes, at least one shaft portion, and faces the base with the dielectric layer sandwiched therebetween, the at least one shaft axis extending along the one axis direction; and a sealing layer that is provided on the first surface and covers the plurality of circuit parts and the rigid member.

Abstract: Provided is a resistive-switching memory device that includes: a resistive-switching insulating film; a source electrode arranged on a first main surface of the resistive-switching insulating film; a drain electrode arranged on the first main surface; and a gate electrode arranged on a second main surface of the resistive-switching insulating film, the second main surface being opposite to the first main surface.

Abstract: Proposed are thin film MIM capacitors with which deterioration of insulating properties and leakage current properties can be sufficiently inhibited. Also proposed is a manufacturing method for the thin film MIM capacitors. For the thin film MIM capacitor (1), a lower electrode (3), a base metal thin film (4), the dielectric thin film (5) and the upper electrode (6) are formed to approximately the same area. The lower electrode (3) has a configuration that differs from the other films to form a part for external connection. The side surface of the base metal thin film (4), the dielectric thin film (5), and the upper electrode (6) are covered with a base metal oxide (7) that comprises the same metal atoms as the base metal thin film (4).

Abstract: A wiring board provided with a silicon substrate including a through hole that communicates a first surface and a second surface of the silicon substrate. A capacitor is formed on an insulating film, which is applied to the silicon substrate, on the first surface and a wall surface defining the through hole. A capacitor part of the capacitor includes a first electrode, a dielectric layer, and a second electrode that are sequentially deposited on the insulating film on the first surface and the wall surface of the through hole. A penetration electrode is formed in the through hole covered by the first electrode, the dielectric layer, and the second electrode of the capacitor part.

Abstract: A wiring board includes a silicon substrate with a through hole communicating with first and second substrate surfaces. A capacitor includes a capacitor part mounted on an insulating film covering the substrate first surface and including a first electrode on the insulating film, a first dielectric layer on the first electrode, and a second electrode on the first dielectric layer. A multilayer structure arranged on a wall surface defining the through hole includes the insulating film on the through hole wall surface, a first metal layer on the insulating film formed from the same material as the first electrode, a second dielectric layer on the first metal layer formed from the same material as the first dielectric layer, and a second metal layer on the second dielectric layer formed from the same material as the second electrode. The multilayer structure covers a penetration electrode in the through hole.

Abstract: A transmitting/receiving filter (filter device) according to one embodiment of the present invention is provided with a transmitting filter, a receiving filter, and a support substrate. The transmitting filter includes a first resonator constituted of a BAW device (FBAR, SMR). The receiving filter includes a second resonator constituted of a Lamb wave device. The support substrate supports both the transmitting filter and the receiving filter. The transmitting filter and the receiving filter are constituted of elastic wave resonators that resonate at different oscillation modes from each other, which allows miniaturization of the support substrate to be realized while preventing oscillation interference between the two filters.

Abstract: A thin-film capacitor 10 has an MIM structure in which a lower electrode 14, a dielectric layer 16, and an upper electrode 18 are formed in order on a substrate 12. Of the upper and lower electrodes 18 and 14, at least the upper electrode 18 is formed of a laminated electrode in which a nitride and a metal are laminated. The nitride preferably contains a high-melting point metal, such as Ta or Ti. In addition, the metal laminated along with the nitride is preferably the same as the metal contained in the nitride. Yet additionally, the nitride may contain Si. Thus, by using the laminated electrode containing the nitride in at least the upper electrode 18, identical I-V characteristics can be obtained and reliability is improved without the need for an annealing treatment for characteristic recovery necessary when a Pt electrode is used. Still additionally, adhesion between the dielectric layer 16 and the upper electrode 18 is improved, and therefore, delamination does not occur.

Abstract: An inexpensive variable inductor has inductance value continuously changeable without reducing a Q value. When a control voltage is applied to a control terminal of a MOS transistor from a power supply, a continuity region is formed in a channel, and a region between main terminals becomes conductive. When the control voltage is changed, length of the continuity region in the channel is changed. This changes length of a path area of an induced current, flowing in an induced current film. Thus, the amount of induced current is increased or decreased. Therefore, when the control voltage of the MOS transistor is changed, the inductance value of the coil is continuously changed.

Abstract: A wiring board includes a silicon substrate with a through hole communicating with first and second substrate surfaces. A capacitor includes a capacitor part mounted on an insulating film covering the substrate first surface and including a first electrode on the insulating film, a first dielectric layer on the first electrode, and a second electrode on the first dielectric layer. A multilayer structure arranged on a wall surface defining the through hole includes the insulating film on the through hole wall surface, a first metal layer on the insulating film formed from the same material as the first electrode, a second dielectric layer on the first metal layer formed from the same material as the first dielectric layer, and a second metal layer on the second dielectric layer formed from the same material as the second electrode. The multilayer structure covers a penetration electrode in the through hole.

Abstract: A wiring board provided with a silicon substrate including a through hole that communicates a first surface and a second surface of the silicon substrate. A capacitor is formed on an insulating film, which is applied to the silicon substrate, on the first surface and a wall surface defining the through hole. A capacitor part of the capacitor includes a first electrode, a dielectric layer, and a second electrode that are sequentially deposited on the insulating film on the first surface and the wall surface of the through hole. A penetration electrode is formed in the through hole covered by the first electrode, the dielectric layer, and the second electrode of the capacitor part.

Abstract: An inexpensive variable inductor has inductance value continuously changeable without reducing a Q value. When a control voltage is applied to a control terminal of a MOS transistor from a power supply, a continuity region is formed in a channel, and a region between main terminals becomes conductive. When the control voltage is changed, length of the continuity region in the channel is changed. This changes length of a path area of an induced current, flowing in an induced current film. Thus, the amount of induced current is increased or decreased. Therefore, when the control voltage of the MOS transistor is changed, the inductance value of the coil is continuously changed.

Abstract: An inexpensive variable inductor has inductance value continuously changeable without reducing a Q value. When a control voltage is applied to a control terminal of a MOS transistor from a power supply, a continuity region is formed in a channel, and a region between main terminals becomes conductive. When the control voltage is changed, length of the continuity region in the channel is changed. This changes length of a path area of an induced current, flowing in an induced current film. Thus, the amount of induced current is increased or decreased. Therefore, when the control voltage of the MOS transistor is changed, the inductance value of the coil is continuously changed.

Abstract: Proposed are thin film MIM capacitors with which deterioration of insulating properties and leakage current properties can be sufficiently inhibited. Also proposed is a manufacturing method for the thin film MIM capacitors. For the thin film MIM capacitor (1), a lower electrode (3), a base metal thin film (4), the dielectric thin film (5) and the upper electrode (6) are formed to approximately the same area. The lower electrode (3) has a configuration that differs from the other films to form a part for external connection. The side surface of the base metal thin film (4), the dielectric thin film (5), and the upper electrode (6) are covered with a base metal oxide (7) that comprises the same metal atoms as the base metal thin film (4).

Abstract: An inexpensive variable inductor has inductance value continuously changeable without reducing a Q value. When a control voltage is applied to a control terminal of a MOS transistor from a power supply, a continuity region is formed in a channel, and a region between main terminals becomes conductive. When the control voltage is changed, length of the continuity region in the channel is changed. This changes length of a path area of an induced current, flowing in an induced current film. Thus, the amount of induced current is increased or decreased. Therefore, when the control voltage of the MOS transistor is changed, the inductance value of the coil is continuously changed.

Abstract: Provided is a manufacturing method of a compound semiconductor having at least one layer of carbon-doped p-type semiconductor epitaxial layer by a MOVPE process, wherein carbon trichloride bromide is used as a carbon source of carbon to be added to the p-type semiconductor epitaxial layer. In the method the etching amount during growth is relatively small, and carbon can be added to a high concentration even with a large MOVPE apparatus.

Abstract: A semiconductor comprising an n-type semiconductor layer 1 with donor impurities added thereto, a semiconductor layer 2 having the value of energy from vacuum level to Fermi level larger than the value of energy from vacuum level to the lower end of the conduction band of the n-type semiconductor 1 and a junction connected to said semiconductor layer 2, characterized in that the donor impurities concentration (N.sub.d) in the range of thickness of the depletion layer generated in said n-type semiconductor layer 1 in contact with the junction boundary is at least2.7.times.10.sup.3 exp{-5.5(E.sub.C -E.sub.FS)}.times.N.sub.C(where E.sub.C is the energy value in eV from the upper end of the valence band to the lower end of the conduction band of the n-type semiconductor 1, E.sub.FS is the energy value in eV from the upper end of the valence band to the charge neutrality level of the n-type semiconductor 1, and N.sub.C is the effective density of states in cm.sup.