Abstract: Benzodiazepine derivatives of formula (I) wherein R.sup.1 is aryl which may have one or more suitable substituent(s), R.sup.2 is C.sub.3 -C.sub.8 cycloalkyl which may have one or more suitable substituent(s), A is lower alkylene, R.sup.3 is a heterocyclic group selected from the group consisting of tetrahydrofuryl, dioxolanyl, filryl, thienyl, isoxazolyl, pyridyl, benzimidazolyl, benzotiazolyl, benzoxazolyl, benzopyrany, quinolyl, isoquinolyl, tetrahydroisoquinolyl, benzothienyl and benzofuryl, each of which may have one or more suitable substituent(s), or a pharmaceutically acceptable salt thereof, which are useful as a medicament.

Abstract: To produce a thin strip having a high cast strip toughness from a thin cast strip of a Cr-stainless steel containing Nb, Ti, and Al in an amount of 0.05% or more, a process includes the steps of: casting a thin cast strip of a Cr-stainless steel having a thickness of 10 mm or less, the steel containing 13-25 wt % of Cr, 0.05-1 wt % of one or more of Nb, Ti, Al and V in terms of a total amount, 0.03 wt % or less of C, 0.03 wt % or less of N, and 0.3-3.0 wt % of Mo in accordance with need, and having a .gamma.p value of 0% or less; hot-rolling the thin cast strip in a temperature range of from 1150.degree. to 950.degree. C. at a reduction in thickness of 5 to 50% to form a thin strip; either slowly cooling the thin strip at a rate of 20.degree. C./sec or less or holding the thin strip for 5 sec or more, in a temperature range of from 1150.degree. to 950.degree. C.; and then coiling the thin strip at a temperature lower than 700.degree. C..gamma.p(%)=420C+470N+23Ni+9Cu+7Mn-11.5Cr-11.

Abstract: A gate array is provided which includes a semiconductor substrate having a main surface. The main surface includes a cell region and a channel region adjacent to the cell region. A cell column including a plurality of basic cells arranged regularly is provided in the cell region. A first interconnecting line is provided in the channel region for connecting the basic cells. In accordance with the gate array, as the first interconnecting line is formed in the channel region in advance for connecting the basic cells, it is not necessary to form a first interconnecting line when manufacturing a semiconductor integrated circuit device. Accordingly, the time period for development of a semiconductor integrated circuit device can be reduced as compared with a case where conventional basic cells are used.