Patents by Inventor Yuichi SAWAHARA
Yuichi SAWAHARA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12081201Abstract: According to one embodiment, an inrush current suppression circuit includes a normally-on transistor, a normally-off transistor connected in series with the normally-on transistor, a first drive circuit that drives the normally-on transistor, a second drive circuit that drives the normally-off transistor, a diode connected between an output of the first drive circuit and an output terminal of the normally-off transistor, a first power source smoothing circuit that performs smoothing of a source current to be supplied to the first drive circuit and the second drive circuit, and a switch circuit that switches connection/disconnection of a current path passing through the first power source smoothing circuit.Type: GrantFiled: March 8, 2023Date of Patent: September 3, 2024Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Yuichi Sawahara, Hideaki Majima
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Publication number: 20240106427Abstract: According to one embodiment, an inrush current suppression circuit includes a normally-on transistor, a normally-off transistor connected in series with the normally-on transistor, a first drive circuit that drives the normally-on transistor, a second drive circuit that drives the normally-off transistor, a diode connected between an output of the first drive circuit and an output terminal of the normally-off transistor, a first power source smoothing circuit that performs smoothing of a source current to be supplied to the first drive circuit and the second drive circuit, and a switch circuit that switches connection/disconnection of a current path passing through the first power source smoothing circuit.Type: ApplicationFiled: March 8, 2023Publication date: March 28, 2024Inventors: Yuichi SAWAHARA, Hideaki MAJIMA
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Patent number: 11681315Abstract: A regulator circuit according to one embodiment includes a first transistor, a filter, and a differential amplifier. The first transistor is provided between an input terminal on a power supply side and an output terminal on an output side. The differential amplifier includes an output node connected to the first transistor, and controls the first transistor on the basis of a result of comparison between a reference voltage and a feedback voltage according to an output voltage applied to the output terminal. The filter is connected to a control node that makes a differential pair with the output node, in the differential amplifier.Type: GrantFiled: June 30, 2022Date of Patent: June 20, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Yuichi Sawahara
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Patent number: 11601108Abstract: According to one embodiment, in an isolator, a first capacitive element is arranged on a first signal line. The first capacitive element has one end electrically connected to an input side circuit and having another end electrically connected to an output side circuit. A second capacitive element is arranged on a second signal line. The second capacitive element having one end electrically connected to the input side circuit and having another end electrically connected to the output side circuit. A first inductive element has one end electrically connected to a first node between the first capacitive element in the first signal line and the output side circuit. A second inductive element has one end electrically connected to a second node between the second capacitive element in the second signal line and the output side circuit.Type: GrantFiled: February 13, 2019Date of Patent: March 7, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Yuichi Sawahara
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Patent number: 11480983Abstract: A regulator circuit according to one embodiment includes a first transistor, a filter, and a differential amplifier. The first transistor is provided between an input terminal on a power supply side and an output terminal on an output side. The differential amplifier includes an output node connected to the first transistor, and controls the first transistor on the basis of a result of comparison between a reference voltage and a feedback voltage according to an output voltage applied to the output terminal. The filter is connected to a control node that makes a differential pair with the output node, in the differential amplifier.Type: GrantFiled: June 17, 2020Date of Patent: October 25, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Yuichi Sawahara
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Publication number: 20220334603Abstract: A regulator circuit according to one embodiment includes a first transistor, a filter, and a differential amplifier. The first transistor is provided between an input terminal on a power supply side and an output terminal on an output side. The differential amplifier includes an output node connected to the first transistor, and controls the first transistor on the basis of a result of comparison between a reference voltage and a feedback voltage according to an output voltage applied to the output terminal. The filter is connected to a control node that makes a differential pair with the output node, in the differential amplifier.Type: ApplicationFiled: June 30, 2022Publication date: October 20, 2022Inventor: Yuichi Sawahara
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Patent number: 11476846Abstract: According to one embodiment, a drive control circuit includes a first transistor that supplies a current to a gate of an output transistor in response to a drive signal, a second transistor that supplies a current to a capacitor in response to the drive signal, a comparison circuit that compares a gate voltage of the output transistor and a voltage of the capacitor, a control signal generation circuit that generates a control signal in response to an output signal of the comparison circuit and the drive signal, and a third transistor that supplies a current to a gate of the output transistor in response to the control signal.Type: GrantFiled: February 18, 2021Date of Patent: October 18, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yuichi Sawahara, Hideaki Majima
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Publication number: 20220085805Abstract: According to one embodiment, a drive control circuit includes a first transistor that supplies a current to a gate of an output transistor in response to a drive signal, a second transistor that supplies a current to a capacitor in response to the drive signal, a comparison circuit that compares a gate voltage of the output transistor and a voltage of the capacitor, a control signal generation circuit that generates a control signal in response to an output signal of the comparison circuit and the drive signal, and a third transistor that supplies a current to a gate of the output transistor in response to the control signal.Type: ApplicationFiled: February 18, 2021Publication date: March 17, 2022Inventors: Yuichi Sawahara, Hideaki Majima
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Publication number: 20210089066Abstract: A regulator circuit according to one embodiment includes a first transistor, a filter, and a differential amplifier. The first transistor is provided between an input terminal on a power supply side and an output terminal on an output side. The differential amplifier includes an output node connected to the first transistor, and controls the first transistor on the basis of a result of comparison between a reference voltage and a feedback voltage according to an output voltage applied to the output terminal. The filter is connected to a control node that makes a differential pair with the output node, in the differential amplifier.Type: ApplicationFiled: June 17, 2020Publication date: March 25, 2021Inventor: Yuichi Sawahara
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Publication number: 20200075229Abstract: According to one embodiment, in an isolator, a first capacitive element is arranged on a first signal line. The first capacitive element has one end electrically connected to an input side circuit and having another end electrically connected to an output side circuit. A second capacitive element is arranged on a second signal line. The second capacitive element having one end electrically connected to the input side circuit and having another end electrically connected to the output side circuit. A first inductive element has one end electrically connected to a first node between the first capacitive element in the first signal line and the output side circuit. A second inductive element has one end electrically connected to a second node between the second capacitive element in the second signal line and the output side circuit.Type: ApplicationFiled: February 13, 2019Publication date: March 5, 2020Inventor: Yuichi Sawahara
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Patent number: 10263311Abstract: A transmission line according to an embodiment, includes a first conductor layer, a second conductor layer spaced apart from the first conductor layer, a first conductor line including a first region facing the first conductor layer and a second region facing the second conductor layer, the first conductor line being spaced apart from the first conductor layer and the second conductor layer, the first conductor line extending in a first direction, and a second conductor line spaced apart from the first conductor layer, the second conductor layer, and the first conductor line, the second conductor line extending in the first direction, the second conductor line being shorter than the first conductor line in the first direction in length.Type: GrantFiled: September 1, 2017Date of Patent: April 16, 2019Assignee: Kabushiki Kaisha ToshibaInventors: Hiroyuki Kayano, Yuichi Sawahara
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Publication number: 20180277917Abstract: A transmission line according to an embodiment, includes a first conductor layer, a second conductor layer spaced apart from the first conductor layer, a first conductor line including a first region facing the first conductor layer and a second region facing the second conductor layer, the first conductor line being spaced apart from the first conductor layer and the second conductor layer, the first conductor line extending in a first direction, and a second conductor line spaced apart from the first conductor layer, the second conductor layer, and the first conductor line, the second conductor line extending in the first direction, the second conductor line being shorter than the first conductor line in the first direction in length.Type: ApplicationFiled: September 1, 2017Publication date: September 27, 2018Applicant: Kabushiki Kaisha ToshibaInventors: Hiroyuki KAYANO, Yuichi SAWAHARA