Patents by Inventor Yuichi Tokunaga

Yuichi Tokunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • HETEROCYCLIC COMPOUND AND USE THEREOF
    Publication number: 20240360080
    Abstract: The present invention provides a heterocyclic compound having an orexin type 2 receptor agonist activity. A compound represented by the formula (I): wherein each symbol is as described in the specification, or a salt thereof has an orexin type 2 receptor agonist activity, and is useful as an agent for the prophylaxis or treatment of narcolepsy.
    Type: Application
    Filed: November 27, 2023
    Publication date: October 31, 2024
    Inventors: Yasushi HATTORI, Yuhei MIYANOHANA, Yuichi KAJITA, Tatsuki KOIKE, Yasutaka HOASHI, Norihito TOKUNAGA, Alexander Martin PAWLICZEK, Tsuneo ODA, Tohru MIYAZAKI, Yoshiteru ITO, Kohei TAKEUCHI, Keisuke IMAMURA, Takahiro SUGIMOTO
  • HETEROCYCLIC COMPOUND
    Publication number: 20240317765
    Abstract: The present invention provides a heterocyclic compound having an orexin type 2 receptor agonist activity. A compound represented by the formula (I): wherein each symbol is as described in the specification, or a salt thereof, is useful as an agent for the prophylaxis or treatment of narcolepsy.
    Type: Application
    Filed: April 8, 2024
    Publication date: September 26, 2024
    Inventors: Yasushi HATTORI, Marilena PIRA, Yoshiteru ITO, Kohei TAKEUCHI, Eiji KIMURA, Norihito TOKUNAGA, Shuhei IKEDA, Martin Alexander PAWLICZEK, Noriyuki TEZUKA, Yasutaka HOASHI, Yuhei MIYANOHANA, Yuichi KAJITA, Tatsuki KOIKE
  • MACROCYCLIC HETEROCYCLE COMPOUNDS AND USE THEREOF
    Publication number: 20240309016
    Abstract: The present invention provides a heterocyclic compound having an orexin type 2 receptor agonist activity. A compound represented by the formula (I): wherein each symbol is as described in the specification, or a salt thereof has an orexin type 2 receptor agonist activity, and is useful as an agent for the prophylaxis or treatment of narcolepsy.
    Type: Application
    Filed: March 15, 2024
    Publication date: September 19, 2024
    Inventors: Mitsunori KONO, Yusuke SASAKI, Yuya OGURO, Zenichi IKEDA, Osamu KUBO, Masaki SETO, Toru YAMASHITA, Makoto KAMATA, Kenjiro SATO, Matthew Thomas REYNOLDS, Kazuaki TAKAMI, Asato KINA, Takafumi YUKAWA, Minoru NAKAMURA, Taku KAMEI, Hiroyuki KAKEI, Fumie YAMAGUCHI, Tomohiro OHASHI, Keiko KAKEGAWA, Takuto KOJIMA, Florian PÜNNER, Masataka MURAKAMI, Takahiko TANIGUCHI, Tatsuki KOIKE, Yuichi KAJITA, Yuhei MIYANOHANA, Kohei TAKEUCHI, Yoshiteru ITO, Norihito TOKUNAGA, Yasushi HATTORI, Eiji KIMURA, Martin Alexander PAWLICZEK, Marilena PIRA, Shuhei IKEDA, Noriyuki TEZUKA, Yoshikazu WATANABE, Kevin CURRAN, Nicolle DOERING, Maria HOPKINS, Ben JOHNSON, Andre KIRYANOV, Jon LAM, Sean MURPHY, Natasha O'ROURKE, Holly REICHARD, Paul TANIS, Yunlong ZHANG
  • Heterocyclic compound
    Patent number: 12091410
    Abstract: The present invention provides a heterocyclic compound having an orexin type 2 receptor agonist activity. A compound represented by the formula (I): wherein each symbol is as described in the description, or a salt thereof has an orexin type 2 receptor agonist activity, and is useful as an agent for the prophylaxis or treatment of narcolepsy.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: September 17, 2024
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Yuichi Kajita, Yuhei Miyanohana, Tatsuki Koike, Yasutaka Hoashi, Yasushi Hattori, Norihito Tokunaga, Tsuneo Oda, Tohru Miyazaki, Dilhumar Uyghur, Yoshiteru Ito, Kohei Takeuchi, Keisuke Imamura, Takahiro Sugimoto, Koichiro Fukuda, Yasuhisa Kohara, Rei Okamoto, Taiichi Ohra, Naoki Miyamoto, Yoshito Terao, Masanori Kawasaki
  • Heterocyclic compound and application thereof
    Patent number: 12077522
    Abstract: The present invention provides a heterocyclic compound having an orexin type 2 receptor agonist activity. A compound represented by the formula (I): wherein each symbol is as described in the specification, or a salt thereof has an orexin type 2 receptor agonist activity, and is useful as an agent for the prophylaxis or treatment of narcolepsy.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: September 3, 2024
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Tatsuhiko Fujimoto, Koichiro Fukuda, Hiromichi Sugimoto, Kentaro Rikimaru, Yoshihiro Banno, Takahiro Matsumoto, Norihito Tokunaga, Yoshihide Tomata, Yuji Ishichi, Shogo Marui, Tsuneo Oda, Tohru Miyazaki, Yasutaka Hoashi, Yasushi Hattori, Yuichi Kajita, Yuhei Miyanohana, Tatsuki Koike
  • Heterocyclic compound
    Patent number: 12071434
    Abstract: The present invention provides a heterocyclic compound having an orexin type 2 receptor agonist activity. A compound represented by the formula (I): wherein each symbol is as described in the description, or a salt thereof has an orexin type 2 receptor agonist activity, and is useful as an agent for the prophylaxis or treatment of narcolepsy.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: August 27, 2024
    Assignee: Takeda Pharmaceutical Company Limited
    Inventors: Yuhei Miyanohana, Yuichi Kajita, Tatsuki Koike, Yasutaka Hoashi, Yasushi Hattori, Norihito Tokunaga, Tsuneo Oda, Tohru Miyazaki, Dilhumar Uyghur, Yoshiteru Ito, Kohei Takeuchi, Keisuke Imamura, Takahiro Sugimoto, Koichiro Fukuda, Yasuhisa Kohara, Rei Okamoto, Taiichi Ohra, Naoki Miyamoto, Jun Chiba, Yoshito Terao, Masanori Kawasaki
  • Monitoring unit, control system, and computer readable medium
    Patent number: 10007570
    Abstract: In an in-vehicle network system (100), a parent control unit (10) and a child control unit (20) constitute a control unit. In the in-vehicle network system (100), a monitoring unit (70) acquires communication data being communicated between the parent control unit (10) and the child control unit (20) and flowing in an in-vehicle network (30) which connects the parent control unit (10) and the child control unit (20) to each other. The monitoring unit (70) diagnoses an abnormality in the parent control unit (10) based on the communication data acquired by the monitoring unit (70) and diagnostic data stored by a memory unit.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: June 26, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuta Wada, Yuichi Tokunaga, Hirohito Nishiyama, Masuo Ito, Tatsunori Tsujimura, Shigekazu Okamura, Daisuke Tanimoto, Makoto Itoi
  • In-vehicle communication system and in-vehicle communication method
    Patent number: 9925935
    Abstract: An increase in the number of signal lines of a control apparatus for controlling devices of an automobile can be prevented and safety of the automobile can be secured. An in-vehicle communication system includes an input DHM that obtains device data from an input device, a BCM that generates control data for controlling an output device based on a value of the device data, and an output DHM that controls the output device according to the control data. The input DHM is composed of duplexed input control blocks, duplexed input shared memories, and an input NW control block. The BCM is composed of a BCM_NW control block, duplexed BCM shared memories for different intended uses, and duplexed arithmetic blocks. The output DHM is composed of an output NW control block, duplexed output shared memories, duplexed output control blocks, and a matching circuit.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: March 27, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hirohito Nishiyama, Masuo Ito, Keisuke Morita, Yuichi Tokunaga, Daisuke Tanimoto, Shigekazu Okamura, Hiroyuki Tsuji, Mitsuhiro Mimura
  • MONITORING UNIT, CONTROL SYSTEM, AND MONITORING PROGRAM
    Publication number: 20160217023
    Abstract: In an in-vehicle network system (100), a parent control unit (10) and a child control unit (20) constitute a control unit. In the in-vehicle network system (100), a monitoring unit (70) acquires communication data being communicated between the parent control unit (10) and the child control unit (20) and flowing in an in-vehicle network (30) which connects the parent control unit (10) and the child control unit (20) to each other. The monitoring unit (70) diagnoses an abnormality in the parent control unit (10) based on the communication data acquired by the monitoring unit (70) and diagnostic data stored by a memory unit.
    Type: Application
    Filed: December 4, 2013
    Publication date: July 28, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yuta Wada, Yuichi Tokunaga, Hirohito Nishiyama, Masuo Ito, Tatsunori Tsujimura, Shigekazu Okamura, Daisuke Tanimoto, Makoto Itoi
  • IN-VEHICLE COMMUNICATION SYSTEM AND IN-VEHICLE COMMUNICATION METHOD
    Publication number: 20150217706
    Abstract: An increase in the number of signal lines of a control apparatus for controlling devices of an automobile can be prevented and safety of the automobile can be secured. An in-vehicle communication system includes an input DHM that obtains device data from an input device, a BCM that generates control data for controlling an output device based on a value of the device data, and an output DHM that controls the output device according to the control data. The input DHM is composed of duplexed input control blocks, duplexed input shared memories, and an input NW control block. The BCM is composed of a BCM_NW control block, duplexed BCM shared memories for different intended uses, and duplexed arithmetic blocks. The output DHM is composed of an output NW control block, duplexed output shared memories, duplexed output control blocks, and a matching circuit.
    Type: Application
    Filed: August 24, 2012
    Publication date: August 6, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hirohito Nishiyama, Masuo Ito, Keisuke Morita, Yuichi Tokunaga, Daisuke Tanimoto, Shigekazu Okamura, Hiroyuki Tsuji, Mitsuhiro Mimura
  • Current controller for contact and a controlling method for contact
    Patent number: 6430021
    Abstract: A current controller for controlling a current supplied to a contact having an external power supply, includes a contact monitoring unit for monitoring the opening and the closing of the contact, a logical computing unit for analyzing a transition of the contact based on the monitoring result from the contact monitoring unit, and a short-circuit unit for short-circuiting the input route based on a direction from the logical computing unit. The logical computing unit turns on the short-circuit unit when the logical computing unit detects chattering at the opening of the contact, and turns off the short-circuit unit after the chattering ends at the closing of the contact.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: August 6, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yuichi Tokunaga
  • Multiprocessor apparatus
    Publication number: 20020095609
    Abstract: A multiprocessor apparatus includes a high speed processor coupled to a high speed bus, a low speed processor coupled to a low speed bus, a bus adapter for coupling between the high speed bus and the low speed bus, an operating system for determining as to at which processor application program is to be executed, and an activation controller for activating clock signal for the processor which executes the application program, based on the determination result of the operating system.
    Type: Application
    Filed: July 2, 2001
    Publication date: July 18, 2002
    Inventor: Yuichi Tokunaga
  • Cache controller fault tolerant computer and data transfer system setting recovery points
    Patent number: 6070232
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: May 30, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki
  • System for performing cache flush transactions from interconnected processor modules to paired memory modules
    Patent number: 5829030
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module 301 is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module 303 has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: October 27, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki
  • Cache controller with index stack for coherency fault tolerance
    Patent number: 5749091
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module 301 is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module 303 has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: May 5, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki