Patents by Inventor Yuichi Tokunaga

Yuichi Tokunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12204603
    Abstract: In order to solve a conventional problem that it is not possible to manage partial content in a webpage as a block and execute processing on the block, a webpage processing apparatus includes: a block information storage unit in which one or more pieces of block information each having a block identifier for identifying a block, which is partial content in a webpage, and location identifying information for specifying a location of the block in the webpage are stored; a block processing unit that executes block processing, which is processing regarding a block specified with block information, using location identifying information contained in any one of the one or more pieces of block information; and a result output unit that outputs a block processing result, which is a result of the block processing. Accordingly, it is possible to manage a block, which is partial content in a webpage, and execute processing on the block.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: January 21, 2025
    Assignee: PLAID, INC.
    Inventors: Takahiro Tokunaga, Yuichi Yabu, Takami Yamada, Kazuhiro Kimura, Ryosuke Suzuki, Naoya Muto, Hirofumi Tanahashi, Minori Tokuda
  • Patent number: 10007570
    Abstract: In an in-vehicle network system (100), a parent control unit (10) and a child control unit (20) constitute a control unit. In the in-vehicle network system (100), a monitoring unit (70) acquires communication data being communicated between the parent control unit (10) and the child control unit (20) and flowing in an in-vehicle network (30) which connects the parent control unit (10) and the child control unit (20) to each other. The monitoring unit (70) diagnoses an abnormality in the parent control unit (10) based on the communication data acquired by the monitoring unit (70) and diagnostic data stored by a memory unit.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: June 26, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuta Wada, Yuichi Tokunaga, Hirohito Nishiyama, Masuo Ito, Tatsunori Tsujimura, Shigekazu Okamura, Daisuke Tanimoto, Makoto Itoi
  • Patent number: 9925935
    Abstract: An increase in the number of signal lines of a control apparatus for controlling devices of an automobile can be prevented and safety of the automobile can be secured. An in-vehicle communication system includes an input DHM that obtains device data from an input device, a BCM that generates control data for controlling an output device based on a value of the device data, and an output DHM that controls the output device according to the control data. The input DHM is composed of duplexed input control blocks, duplexed input shared memories, and an input NW control block. The BCM is composed of a BCM_NW control block, duplexed BCM shared memories for different intended uses, and duplexed arithmetic blocks. The output DHM is composed of an output NW control block, duplexed output shared memories, duplexed output control blocks, and a matching circuit.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: March 27, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hirohito Nishiyama, Masuo Ito, Keisuke Morita, Yuichi Tokunaga, Daisuke Tanimoto, Shigekazu Okamura, Hiroyuki Tsuji, Mitsuhiro Mimura
  • Publication number: 20160217023
    Abstract: In an in-vehicle network system (100), a parent control unit (10) and a child control unit (20) constitute a control unit. In the in-vehicle network system (100), a monitoring unit (70) acquires communication data being communicated between the parent control unit (10) and the child control unit (20) and flowing in an in-vehicle network (30) which connects the parent control unit (10) and the child control unit (20) to each other. The monitoring unit (70) diagnoses an abnormality in the parent control unit (10) based on the communication data acquired by the monitoring unit (70) and diagnostic data stored by a memory unit.
    Type: Application
    Filed: December 4, 2013
    Publication date: July 28, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yuta Wada, Yuichi Tokunaga, Hirohito Nishiyama, Masuo Ito, Tatsunori Tsujimura, Shigekazu Okamura, Daisuke Tanimoto, Makoto Itoi
  • Publication number: 20150217706
    Abstract: An increase in the number of signal lines of a control apparatus for controlling devices of an automobile can be prevented and safety of the automobile can be secured. An in-vehicle communication system includes an input DHM that obtains device data from an input device, a BCM that generates control data for controlling an output device based on a value of the device data, and an output DHM that controls the output device according to the control data. The input DHM is composed of duplexed input control blocks, duplexed input shared memories, and an input NW control block. The BCM is composed of a BCM_NW control block, duplexed BCM shared memories for different intended uses, and duplexed arithmetic blocks. The output DHM is composed of an output NW control block, duplexed output shared memories, duplexed output control blocks, and a matching circuit.
    Type: Application
    Filed: August 24, 2012
    Publication date: August 6, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hirohito Nishiyama, Masuo Ito, Keisuke Morita, Yuichi Tokunaga, Daisuke Tanimoto, Shigekazu Okamura, Hiroyuki Tsuji, Mitsuhiro Mimura
  • Patent number: 6430021
    Abstract: A current controller for controlling a current supplied to a contact having an external power supply, includes a contact monitoring unit for monitoring the opening and the closing of the contact, a logical computing unit for analyzing a transition of the contact based on the monitoring result from the contact monitoring unit, and a short-circuit unit for short-circuiting the input route based on a direction from the logical computing unit. The logical computing unit turns on the short-circuit unit when the logical computing unit detects chattering at the opening of the contact, and turns off the short-circuit unit after the chattering ends at the closing of the contact.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: August 6, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yuichi Tokunaga
  • Publication number: 20020095609
    Abstract: A multiprocessor apparatus includes a high speed processor coupled to a high speed bus, a low speed processor coupled to a low speed bus, a bus adapter for coupling between the high speed bus and the low speed bus, an operating system for determining as to at which processor application program is to be executed, and an activation controller for activating clock signal for the processor which executes the application program, based on the determination result of the operating system.
    Type: Application
    Filed: July 2, 2001
    Publication date: July 18, 2002
    Inventor: Yuichi Tokunaga
  • Patent number: 6070232
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: October 10, 1997
    Date of Patent: May 30, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki
  • Patent number: 5829030
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module 301 is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module 303 has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: October 27, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki
  • Patent number: 5749091
    Abstract: A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module 301 is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module 303 has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: May 5, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hitoshi Ishida, Minoru Shiga, Toyohito Hatashita, Yuichi Tokunaga, Hiroyuki Fukuda, Shunyo Minesaki