Abstract: The present invention provides an oscillator circuit that can decrease consumed current. Namely, a second PMOS transistor is provided between a first PMOS transistor in which a constant current flows and an NMOS transistor for amplifying an oscillating signal, in order to interrupt the constant current flowing in the first PMOS transistor MP3 from flowing to a NODE4. The source of the second PMOS transistor is connected to the drain of the first PMOS transistor, the drain of the second PMOS transistor is connected to the source of the NMOS transistor and the gate of the second PMOS transistor is connected to a NODE1. The NODE1 is connected to a bias signal line via a resistance element and also connected to a signal line via a capacitor element.

Abstract: Oscillatory signal output circuitry includes a bias circuit generating a bias voltage, which is applied to an amplifier and an oscillatory circuit to generate an oscillatory signal. The oscillatory signal is capacitively coupled and level-shifted up by the bias voltage to produce output signals. The produced output signals are operatively applied to PMOS and NMOS transistors of an output part. When the voltages of the output signals decrease at the same time, the drain current of the NMOS transistor decreases to output a high level. When the voltages of the output signals increase at the same time, the drain current of the NMOS transistor increases to output a low level. Therefore, the output part attains its large gain, and is ensured to operate to develop the output signal. A variation in threshold voltage would cause the bias voltages to change accordingly, thus being ensured to output the output signal.

Abstract: Oscillatory signal output circuitry includes a bias circuit generating a bias voltage, which is applied to an amplifier and an oscillatory circuit to generate an oscillatory signal. The oscillatory signal is capacitively coupled and level-shifted up by the bias voltage to produce output signals. The produced output signals are operatively applied to PMOS and NMOS transistors of an output part. When the voltages of the output signals decrease at the same time, the drain current of the NMOS transistor decreases to output a high level. When the voltages of the output signals increase at the same time, the drain current of the NMOS transistor increases to output a low level. Therefore, the output part attains its large gain, and is ensured to operate to develop the output signal. A variation in threshold voltage would cause the bias voltages to change accordingly, thus being ensured to output the output signal.

Abstract: A pressure measuring device comprises a main solenoid valve of which a first opening is connected to a pipe through which a fluid to be measured flows and of which a second opening is connected to a pressure transducer. A third opening of the main solenoid valve is connected to an auxiliary solenoid valve which causes the third opening to be exposed to the atmosphere during an inspection and which applies the same pressure as that of the fluid to the third opening during a measurement.