Abstract: To provide a core material for a fiber reinforced composite having an excellent workability upon being composited with a fiber reinforcing material. A core material for a fiber reinforced composite of the present disclosure comprises a molded product of expanded beads containing a thermoplastic resin, and having a heat shrinkage onset temperature of 80° C. or higher, a linear expansion coefficient of 10×10?5 mm/mm·° C. or less, and a ratio of change in dimensions with heating at 130° C. of ?4.0% to 0%.

Abstract: To provide a core material for a fiber reinforced composite having an excellent workability upon being composited with a fiber reinforcing material. A core material for a fiber reinforced composite of the present disclosure comprises a molded product of expanded beads containing a thermoplastic resin, and having a heat shrinkage onset temperature of 80° C. or higher, a linear expansion coefficient of 10×10?5 mm/mm·° C. or less, and a ratio of change in dimensions with heating at 130° C. of ?4.0% to 0%.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: A jitter control apparatus used in a multiplexing apparatus multiplexing a plurality of signals by asynchronous mapping, includes: a detection unit configured to detect a frequency of timing compensation processes in the asynchronous mapping for each of the plurality of signals; and a selection unit configured to select, on basis of a detection result by the detection unit, a clock signal to be used as a carrier clock for the plurality of signals, from a plurality of clock signals including clock signals extracted from at least one of the plurality of signals.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: A plasma etching method includes the step of: etching a silicon layer of a target object by using a plasma generated from a processing gas containing a fluorocarbon gas, a hydrofluorocarbon gas, a rare gas and an O2 gas and by employing a patterned resist film as a mask. The target object includes the silicon layer whose main component is silicon and the patterned resist film formed over the silicon layer.

Abstract: A jitter control apparatus used in a multiplexing apparatus multiplexing a plurality of signals by asynchronous mapping, includes: a detection unit configured to detect a frequency of timing compensation processes in the asynchronous mapping for each of the plurality of signals; and a selection unit configured to select, on basis of a detection result by the detection unit, a clock signal to be used as a carrier clock for the plurality of signals, from a plurality of clock signals including clock signals extracted from at least one of the plurality of signals.

Abstract: A difference in etching rate between the coated silicon based insulating film and any of other kinds of silicon-based insulating films is reduced by using nitrogen gas as a part of the etching gas. Therefore, the underlying film may not be exposed to the etching gas for a long time, so that degradation or deterioration of the underlying film can be prevented.

Abstract: The present invention relates to a wrapping film comprising, as at least one surface layer, a resin composition (D) layer comprising 0.5 to 5 parts by weight of an ethylene-vinyl acetate copolymer having a vinyl acetate content of 30 to 60% by weight (B) and 5 to 40 parts by weight of a liquid additive (C) based on 100 parts by weight of an aliphatic polyester resin (A).

Abstract: A plasma etching method includes the step of: etching a silicon layer of a target object by using a plasma generated from a processing gas containing a fluorocarbon gas, a hydrofluorocarbon gas, a rare gas and an O2 gas and by employing a patterned resist film as a mask. The target object includes the silicon layer whose main component is silicon and the patterned resist film formed over the silicon layer.

Abstract: A wrap film comprising a layer of resin composition (C) as at least one surface layer, wherein resin composition (C) comprises 100 parts by mass of an aliphatic polyester resin (A) and 5 to 40 parts by mass of a liquid additive (B), and having a surface roughness of 0.5 to 4.0 nm, a tensile modulus of 400 to 1500 MPa, a heat resistant temperature of 130° C. or more and cling energy of 0.5 to 2.5 mJ, and a wrap product having the wrap film placed in a box. There is provided an easy-to-use wrap film having cling property and pulling-out property.

Abstract: A difference in etching rate between the coated silicon based insulating film and any of other kinds of silicon-based insulating films is reduced by using nitrogen gas as a part of the etching gas. Therefore, the underlying film may not be exposed to the etching gas for a long time, so that degradation or deterioration of the underlying film can be prevented.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., −400 to −600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: A wrap film comprising a layer of resin composition (C) as at least one surface layer, wherein resin composition (C) comprises 100 parts by mass of an aliphatic polyester resin (A) and 5 to 40 parts by mass of a liquid additive (B), and having a surface roughness of 0.5 to 4.0 nm, a tensile modulus of 400 to 1500 MPa, a heat resistant temperature of 130° C. or more and cling energy of 0.5 to 2.5 mJ, and a wrap product having the wrap film placed in a box. There is provided an easy-to-use wrap film having cling property and pulling-out property.