Abstract: An improved mechanism for performing different types of digital signal processing functions, including correlation, sorting, and filtering operations. The mechanism includes a plurality of computational cells which can be dynamically configured (and reconfigured) in parallel to perform the different types of digital signal processing functions. Preferably, the computation cells carry out such digital signal processing operations in parallel without the need for extensive iteration. Such parallel configuration and subsequent parallel processing operations provide improved computational performance.

Abstract: Methods and apparatus for implementing an enhanced digital signal processor through the addition of modular computation units which can be operated in parallel are described. In various embodiments the computation units are implemented as configurable computation cells which are arranged to form a computation engine which supplements conventional DSP circuitry. The computation cells can be used to perform frequently used DSP functions such a cross-correlation, sorting, FIR filtering quickly without the need for extensive iterative processing. By using the computation cells of the present invention in parallel, the computation of common DSP functions can be performed quickly and resulting in improvements in DSP performance as compared to convention DSPs.

Abstract: Methods and apparatus for providing implementation efficient adaptive equalizers suitable for use with QAM and/or VSB signals are disclosed. Finite impulse response ("FIR") filters are used to implement the disclosed adaptive equalizers. A plurality of arithmetic operator sharing techniques are disclosed for reducing the number of arithmetic operators required to implement the adaptive equalizers. In addition, methods of reconfiguring the arithmetic operators used to implement a QAM equalizer so that they can be used to implement a VSB equalizer circuit are disclosed. Methods of the present invention use multiplexers to reconfigure the FIR filters from a complex decimating FIR filter for use during QAM operation, to a half complex feedforward FIR filter and a real decision feedback FIR filter suitable for use during VSB mode operation of the equalizer circuit of the present invention.