Patents by Inventor Yuji Akashi

Yuji Akashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240138263
    Abstract: A light emitting element of one or more embodiments includes a first electrode, a second electrode oppositely to the first electrode, and an emission layer between the first electrode and the second electrode. The light emitting element of one or more embodiments includes a polycyclic compound represented by a specific chemical structure in the emission layer, thereby showing improved emission efficiency and life characteristics.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 25, 2024
    Inventors: Makoto YAMAMOTO, Keigo HOSHI, Yuji SUZAKI, Hirokazu KUWABARA, Nobutaka AKASHI, Ryuhei FURUE, Toshiyuki MATSUURA, Yoshiro SUGITA, Yuma AOKI, Yuuki MIYAZAKI
  • Publication number: 20060108677
    Abstract: A lower chip is fixed to a surface of an interposer by flip-chip bonding with an under fill acting as an adhesive applied to the surface. A lifted pad having a height of approximately 10 ?m is provided on the surface of the interposer. A bonding wire connects the lifted pad and a bonding pad provided on a surface of an upper chip. A stick-out portion of the under fill at the time of fixing the lower chip to the interposer is dammed by the lifted portion of the lifted pad. This prevents the stick-out portion of the under fill from covering the top of the lifted pad.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 25, 2006
    Inventors: Mitsutaka Ikeda, Katsuhito Kikuma, Sachiko Nogami, Yuji Akashi
  • Patent number: 6818999
    Abstract: A semiconductor device of MCP structure, in which multiple semiconductor chips are provided in a single package and a method of manufacturing the same, that prevents damage of semiconductor chip that does not require burn-in and ensures the initial reliability of the semiconductor chip that requires the burn-in, are provided. The method has the steps of resin sealing and packaging the semiconductor chip that requires the burn-in and performing the burn-in to such packaged semiconductor chip; and mounting the semiconductor chip evaluated to be non-defective in the burn-in to the substrate along with the semiconductor chip not requiring the burn-in.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: November 16, 2004
    Assignee: Fujitsu Limited
    Inventors: Katsuhito Kikuma, Yuji Akashi, Takeshi Ikuta
  • Patent number: 6777799
    Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: August 17, 2004
    Assignee: Fujitsu Limited
    Inventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Takao Nishimura
  • Publication number: 20040051119
    Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.
    Type: Application
    Filed: July 22, 2003
    Publication date: March 18, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Takao Nishimura
  • Publication number: 20030180988
    Abstract: A semiconductor device of MCP structure, in which multiple semiconductor chips are provided in a single package and a method of manufacturing the same, that prevents damage of semiconductor chip that does not require burn-in and ensures the initial reliability of the semiconductor chip that requires the burn-in, are provided. The method has the steps of resin sealing and packaging the semiconductor chip that requires the burn-in and performing the burn-in to such packaged semiconductor chip; and mounting the semiconductor chip evaluated to be non-defective in the burn-in to the substrate along with the semiconductor chip not requiring the burn-in.
    Type: Application
    Filed: January 10, 2003
    Publication date: September 25, 2003
    Inventors: Katsuhito Kikuma, Yuji Akashi, Takeshi Ikuta
  • Patent number: 6621169
    Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: September 16, 2003
    Assignee: Fujitsu Limited
    Inventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Tadashi Uno, Takao Nishimura, Fumihiko Ando, Hiroshi Onodera, Hayato Okuda
  • Publication number: 20020027295
    Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 7, 2002
    Applicant: Fujitsu Limited
    Inventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Tadashi Uno, Takao Nishimura, Fumihiko Ando, Hiroshi Onodera, Hayato Okuda
  • Patent number: 6316838
    Abstract: A semiconductor device includes a substrate provided with a plurality of leads, a face-down semiconductor element provided on one surface of the substrate, a first stacked semiconductor element and a second stacked semiconductor element provided on another surface of the substrate and connected to the substrate by wires, and an extended wiring mechanism for connecting electrodes of the face-down semiconductor element and electrodes of the first and second semiconductor elements. The connected electrodes are equi-electrodes whose electrical characteristics are equal.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: November 13, 2001
    Assignee: Fujitsu Limited
    Inventors: Kaname Ozawa, Hayato Okuda, Tetsuya Hiraoka, Mitsutaka Sato, Yuji Akashi, Akira Okada, Masahiko Harayama
  • Patent number: 6215182
    Abstract: A semiconductor device includes the first through third semiconductor devices which are stacked on a substrate and the first through third wires for connecting the semiconductor elements and the substrate. The first wires serve to connect electrodes of the first semiconductor element positioned uppermost and electrodes of the second semiconductor element. The second wires serve to connect the electrodes of the second semiconductor element and electrodes of the third semiconductor element. The third wires serve to connect the electrodes of the third semiconductor element and bonding pads of the substrate. Between the first wires and the electrodes of the second semiconductor element and between the second wires and the electrodes of the third semiconductor element, stud bumps are provided so as to form space therebetween, thereby avoiding short-circuits therebetween.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: April 10, 2001
    Assignee: Fujitsu Limited
    Inventors: Kaname Ozawa, Hayato Okuda, Ryuji Nomoto, Yuji Akashi, Katsuro Hiraiwa
  • Patent number: 6111312
    Abstract: A semiconductor device is provided. This semiconductor device includes a resin package, a semiconductor chip, and leads consisting of inner leads and outer leads. The rear surface of the semiconductor chip and the inner leads are situated substantially on the same plane. The resin package is provided with notches on its mounting surface. The outer leads are bent inward along the exterior of the resin package and pulled around to the mounting surface, so that the edges of the outer leads are engaged with the notches.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: August 29, 2000
    Assignee: Fujitsu Limited
    Inventors: Yosuke Hirumuta, Yuji Akashi, Susumu Kida
  • Patent number: 4838562
    Abstract: In chucking, a workpiece is clamped while drawn to the chuck body for positive contact of the workpiece to stoppers, whereby a degree of machining accuracy is remarkably improved.
    Type: Grant
    Filed: March 4, 1988
    Date of Patent: June 13, 1989
    Assignee: Yugen Kaisha Akashi Tekkosho
    Inventor: Yuji Akashi