Abstract: A semiconductor device according to an aspect of the present disclosure, includes a semiconductor layer in which a trench is formed, a buried electrode provided inside the trench, an upper electrode provided above the buried electrode inside the trench, an insulating film provided inside the trench, a first electrode provided on an upper surface of the semiconductor layer, and a second electrode provided on a lower surface of the semiconductor layer, wherein the insulating film includes a first portion between the buried electrode and a side wall of the trench, a second portion between the upper electrode and the side wall of the trench, and a third portion between the buried electrode and the upper electrode, and a lower surface of the upper electrode has a dent in a central portion.

Abstract: According to the present disclosure, a semiconductor apparatus comprises a first gate electrode; a second gate electrode connected in parallel with the first gate electrode; a control circuit connected to the first gate electrode and the second gate electrode and configured to control gate voltages; and a coil connected between the second gate electrode and the control circuit.

Abstract: A drift layer has a first conductivity type and is provided on a silicon carbide substrate. A well region has a second conductivity type and is provided on the drift layer. A source region has the first conductivity type and is provided on the well region. A gate trench has an inner surface with a bottom located at a deeper position than the well region and a lateral part continuous with the bottom. An electric field relaxation region has the second conductivity type and has at least a part located below the bottom of the gate trench. A surge relaxation region has the first conductivity type, contacts at least a part of the bottom of the gate trench, and is separated from the drift layer by the electric field relaxation region.

Abstract: A semiconductor test apparatus includes: a power supply; a high-voltage wire connecting high-voltage terminals of a plurality of semiconductor devices which are objects to be tested to a high-voltage side of the power supply; a low-voltage wire connecting low-voltage terminals of the semiconductor devices to a low-voltage side of the power supply; first switches connected in series to the semiconductor devices respectively, each of the first switches having one end connected to the low-voltage side of the power supply via the low-voltage wire and other end connected to the low-voltage terminal; second switches connected to the semiconductor devices respectively, each of the second switches having one end connected to the high-voltage terminal and other end connected to the low-voltage terminal; and a control circuit controlling the first switches and the second switches.

Abstract: A semiconductor test apparatus includes: a power supply; a high-voltage wire connecting high-voltage terminals of a plurality of semiconductor devices which are objects to be tested to a high-voltage side of the power supply; a low-voltage wire connecting low-voltage terminals of the semiconductor devices to a low-voltage side of the power supply; first switches connected in series to the semiconductor devices respectively, each of the first switches having one end connected to the low-voltage side of the power supply via the low-voltage wire and other end connected to the low-voltage terminal; second switches connected to the semiconductor devices respectively, each of the second switches having one end connected to the high-voltage terminal and other end connected to the low-voltage terminal; and a control circuit controlling the first switches and the second switches.

Abstract: An inspection device according to the invention of the present application includes a fixing plate, plural expanding and contracting portions whose one ends are fixed to the fixing plate, plural contact probes that are fixed to the other ends of the plural expanding and contracting portions respectively, and plural fixing portions which are provided to the plural contact probes respectively, wherein each fixing portion performs switching between a fixing state where an upper end of a corresponding contact probe is fixed at a first position and a releasing state where the contact probe is not fixed, the contact probe is pulled to the fixing plate by a corresponding expanding and contracting portion under the fixing state, and the upper end of the contact probe is placed at a second position closer to the fixing plate than the first position under the releasing state.

Abstract: An inspection device according to the invention of the present application includes a fixing plate, plural expanding and contracting portions whose one ends are fixed to the fixing plate, plural contact probes that are fixed to the other ends of the plural expanding and contracting portions respectively, and plural fixing portions which are provided to the plural contact probes respectively, wherein each fixing portion performs switching between a fixing state where an upper end of a corresponding contact probe is fixed at a first position and a releasing state where the contact probe is not fixed, the contact probe is pulled to the fixing plate by a corresponding expanding and contracting portion under the fixing state, and the upper end of the contact probe is placed at a second position closer to the fixing plate than the first position under the releasing state.

Abstract: A drift layer has a first conductivity type and is provided on a silicon carbide substrate. A well region has a second conductivity type and is provided on the drift layer. A source region has the first conductivity type and is provided on the well region. A gate trench has an inner surface with a bottom located at a deeper position than the well region and a lateral part continuous with the bottom. An electric field relaxation region has the second conductivity type and has at least a part located below the bottom of the gate trench. A surge relaxation region has the first conductivity type, contacts at least a part of the bottom of the gate trench, and is separated from the drift layer by the electric field relaxation region.

Abstract: Provided is a semiconductor device including an active region provided in a first conductivity type semiconductor layer and a termination region provided around the active region. A MOS transistor through which a main current flows in a thickness direction of the semiconductor layer is formed in the active region. The termination region includes a defect detection device provided along the active region. The defect detection device includes a diode including a first main electrode provided along the active region on a first main surface of the semiconductor layer, and a second main electrode provided on a second main surface side of the semiconductor layer.

Abstract: A silicon carbide semiconductor device includes an ohmic electrode and a Schottky electrode that are in contact with the drain electrode respectively on the drain electrode and are next to each other; a first conductivity type first withstand voltage holding region in contact with the ohmic electrode on the ohmic electrode; a second conductivity type second withstand voltage holding region in contact with the Schottky electrode on the Schottky electrode and is next to the first withstand voltage holding region; a second conductivity type well region in contact onto the first and second withstand voltage holding regions; a first conductivity type source region selectively provided on a surface layer of the well region; and a gate electrode opposite to a channel region defined by the well region sandwiched between the source region and the first withstand voltage holding region, with a gate oxide film interposed therebetween.

Abstract: Provided is a semiconductor device including an active region provided in a first conductivity type semiconductor layer and a termination region provided around the active region. A MOS transistor through which a main current flows in a thickness direction of the semiconductor layer is formed in the active region. The termination region includes a defect detection device provided along the active region. The defect detection device includes a diode including a first main electrode provided along the active region on a first main surface of the semiconductor layer, and a second main electrode provided on a second main surface side of the semiconductor layer.

Abstract: A silicon carbide semiconductor device includes: a drift layer of a first conductivity type made of silicon carbide; a well region of a second conductivity type formed on the drift layer; a source region of a first conductivity type formed on the well region; a gate insulating film formed on an inner wall of a trench extending from a front surface of the source region through the well region, at least a part of a side surface of the gate insulating film being in contact with the drift layer; a gate electrode formed in the trench with the gate insulating film therebetween; a protective layer of the second conductivity type formed in the drift layer; and a depletion suppressing layer of the first conductivity type formed in the drift layer so as to be in contact with a side surface of the protective layer.

Abstract: A silicon carbide semiconductor device includes an ohmic electrode and a Schottky electrode that are in contact with the drain electrode respectively on the drain electrode and are next to each other; a first conductivity type first withstand voltage holding region in contact with the ohmic electrode on the ohmic electrode; a second conductivity type second withstand voltage holding region in contact with the Schottky electrode on the Schottky electrode and is next to the first withstand voltage holding region; a second conductivity type well region in contact onto the first and second withstand voltage holding regions; a first conductivity type source region selectively provided on a surface layer of the well region; and a gate electrode opposite to a channel region defined by the well region sandwiched between the source region and the first withstand voltage holding region, with a gate oxide film interposed therebetween.

Abstract: A silicon carbide semiconductor device includes: a drift layer of a first conductivity type made of silicon carbide; a well region of a second conductivity type formed on the drift layer; a source region of a first conductivity type formed on the well region; a gate insulating film formed on an inner wall of a trench extending from a front surface of the source region through the well region, at least a part of a side surface of the gate insulating film being in contact with the drift layer; a gate electrode formed in the trench with the gate insulating film therebetween; a protective layer of the second conductivity type formed in the drift layer; and a depletion suppressing layer of the first conductivity type formed in the drift layer so as to be in contact with a side surface of the protective layer.

Abstract: A semiconductor device that can improve reliability while suppressing increase of a conduction loss or a switching loss. In the semiconductor device, when a two-dimensional shape on a main surface of the semiconductor substrate is an unit cell, the shape being a repeating unit of a plurality of well regions periodically disposed in a surface layer of a drift layer, one unit cell and another unit cell adjacent in an x-axis direction are disposed misaligned in a y-axis direction, and one unit cell and another unit cell adjacent in the y-axis direction are disposed misaligned in the x-axis direction.

Abstract: A semiconductor device capable of suppressing time variation of a threshold voltage and a method of manufacturing the same. A semiconductor device according to the present invention comprises a drift layer formed on a semiconductor substrate, first well regions formed in a surface layer of the drift layer, being apart from one another, a gate insulating film formed, extending on the drift layer and each of the first well regions, a gate electrode selectively formed on the gate insulating film, a source contact hole penetrating through the gate insulating film and reaching the inside of each of the first well regions, and a residual compressive stress layer formed on at least a side surface of the source contact hole, in which a compressive stress remains.

Abstract: A semiconductor device capable of suppressing generation of a high electric field and preventing a dielectric breakdown from occurring, and a method of manufacturing the same. The method of manufacturing a semiconductor device includes (a) preparing an n+ substrate to be a ground constituted by a silicon carbide semiconductor of a first conductivity type, (b) forming a recess structure surrounding an element region on the n+ substrate by using a resist pattern, and (d) forming a guard ring injection layer to be an impurity layer of a second conductivity type in a recess bottom surface and a recess side surface in the recess structure by impurity injection through the resist pattern, and a corner portion of the recess structure is covered with the impurity layer.

Abstract: A semiconductor device that can improve reliability while suppressing increase of a conduction loss or a switching loss. In the semiconductor device, when a two-dimensional shape on a main surface of the semiconductor substrate is an unit cell, the shape being a repeating unit of a plurality of well regions periodically disposed in a surface layer of a drift layer, one unit cell and another unit cell adjacent in an x-axis direction are disposed misaligned in a y-axis direction, and one unit cell and another unit cell adjacent in the y-axis direction are disposed misaligned in the x-axis direction.

Abstract: A semiconductor device capable of rapidly and accurately sensing the information regarding the temperature of a semiconductor transistor contained therein. A MOSFET includes a plurality of cells, and includes a main cell group including a cell for supplying a current to a load among the plurality of cells, and a sense cell group including a cell for sensing temperature information regarding the temperature of the MOSFET thereamong. The main cell group and the sense cell group have different temperature characteristics showing changes in electrical characteristics to changes in temperature. A temperature sensing circuit senses the temperature of the MOSFET based on, for example, a value of a main current flowing through the main cell group and a value of a sense current flowing through the sense cell group.

Abstract: A semiconductor device capable of suppressing time variation of a threshold voltage and a method of manufacturing the same. A semiconductor device according to the present invention comprises a drift layer formed on a semiconductor substrate, first well regions formed in a surface layer of the drift layer, being apart from one another, a gate insulating film formed, extending on the drift layer and each of the first well regions, a gate electrode selectively formed on the gate insulating film, a source contact hole penetrating through the gate insulating film and reaching the inside of each of the first well regions, and a residual compressive stress layer formed on at least a side surface of the source contact hole, in which a compressive stress remains.