Patents by Inventor Yuji Furushima
Yuji Furushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210083454Abstract: A surface-emitting semiconductor laser includes a first emission region that outputs first light, and a second emission region that is provided separately from the first emission region, includes a phase shift section, and outputs second light. A far field pattern of the first light and a far field pattern of the second light are different from each other.Type: ApplicationFiled: May 15, 2018Publication date: March 18, 2021Inventors: HIDEHIKO NAKATA, YUJI FURUSHIMA, YUJI MASUI
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Patent number: 10833477Abstract: In a drive unit according to an embodiment of the present disclosure, in each of a plurality of current pulses, a rising crest value is the largest, and after the rising, the crest value is damped. Further, a rising crest value of a pulse of an n+1-th wave is smaller than a rising crest value of a pulse of an n-th wave. Furthermore, rising crest values of the current pulses of a second wave and waves after the second wave are determined by a mathematical function expressed as an electric potential change caused by ON-OFF of an RC time constant circuit that is single-end grounded. Moreover, in the mathematical function, a time constant at an OFF time is larger than a time constant at an ON time.Type: GrantFiled: November 10, 2017Date of Patent: November 10, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Osamu Maeda, Masashi Nakamura, Satoru Fushimi, Yuji Furushima
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Patent number: 10727144Abstract: A light emitting apparatus according to an embodiment of the present technology includes a base portion, a light emitting element, and a cover portion. The base portion includes a support surface. The light emitting element is disposed on the support surface of the base portion. The cover portion includes a light transmission portion through which light emitted from the light emitting element is transmitted and a protrusion portion which is provided on at least a part of a periphery of the light transmission portion and protruded relative to the light transmission portion, the cover portion being provided on the support surface in such a manner as to cover the light emitting element.Type: GrantFiled: November 25, 2016Date of Patent: July 28, 2020Assignee: SNY CORPORATIONInventors: Masahiro Murayama, Yuji Furushima
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Publication number: 20190296518Abstract: In a drive unit according to an embodiment of the present disclosure, in each of a plurality of current pulses, a rising crest value is the largest, and after the rising, the crest value is damped. Further, a rising crest value of a pulse of an n+1-th wave is smaller than a rising crest value of a pulse of an n-th wave. Furthermore, rising crest values of the current pulses of a second wave and waves after the second wave are determined by a mathematical function expressed as an electric potential change caused by ON-OFF of an RC time constant circuit that is single-end grounded. Moreover, in the mathematical function, a time constant at an OFF time is larger than a time constant at an ON time.Type: ApplicationFiled: November 10, 2017Publication date: September 26, 2019Inventors: Osamu MAEDA, Masashi NAKAMURA, Satoru FUSHIMI, Yuji FURUSHIMA
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Publication number: 20190035700Abstract: A light emitting apparatus according to an embodiment of the present technology includes a base portion, a light emitting element, and a cover portion. The base portion includes a support surface. The light emitting element is disposed on the support surface of the base portion. The cover portion includes a light transmission portion through which light emitted from the light emitting element is transmitted and a protrusion portion which is provided on at least a part of a periphery of the light transmission portion and protruded relative to the light transmission portion, the cover portion being provided on the support surface in such a manner as to cover the light emitting element.Type: ApplicationFiled: November 25, 2016Publication date: January 31, 2019Inventors: MASAHIRO MURAYAMA, YUJI FURUSHIMA
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Patent number: 9379523Abstract: A Group III nitride semiconductor device comprises: a Group III nitride semiconductor layer having a primary surface, inclined with respect to a c-plane of the Group III nitride semiconductor at an angle in a range of 50 degrees or more and 80 degrees or less, of a Group III nitride semiconductor; a p-type Group III nitride semiconductor laminate including first to third p-type Group III nitride semiconductor layers, the first to third p-type Group III nitride semiconductor layers being provided on the primary surface of the Group III nitride semiconductor layer, the first and third p-type Group III nitride semiconductor layers sandwiching the second p-type Group III nitride semiconductor layer such that the second p-type Group III nitride semiconductor layer incorporates strain; and an electrode provided on the p-type Group III nitride semiconductor laminate. The electrode is in contact with the first p-type Group III nitride semiconductor layer.Type: GrantFiled: March 10, 2015Date of Patent: June 28, 2016Assignees: Sumitomo Electric Industries, Ltd., SONY CORPORATIONInventors: Yohei Enya, Takashi Kyono, Masaki Ueno, Takao Nakamura, Takashi Matsuura, Tatsushi Hamaguchi, Yuji Furushima
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Publication number: 20150255958Abstract: A Group III nitride semiconductor device comprises: a Group III nitride semiconductor layer having a primary surface, inclined with respect to a c-plane of the Group III nitride semiconductor at an angle in a range of 50 degrees or more and 80 degrees or less, of a Group III nitride semiconductor; a p-type Group III nitride semiconductor laminate including first to third p-type Group III nitride semiconductor layers, the first to third p-type Group III nitride semiconductor layers being provided on the primary surface of the Group III nitride semiconductor layer, the first and third p-type Group III nitride semiconductor layers sandwiching the second p-type Group III nitride semiconductor layer such that the second p-type Group III nitride semiconductor layer incorporates strain; and an electrode provided on the p-type Group III nitride semiconductor laminate. The electrode is in contact with the first p-type Group III nitride semiconductor layer.Type: ApplicationFiled: March 10, 2015Publication date: September 10, 2015Inventors: Yohei ENYA, Takashi KYONO, Masaki UENO, Takao NAKAMURA, Takashi MATSUURA, Tatsushi HAMAGUCHI, Yuji FURUSHIMA
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Patent number: 8494020Abstract: A semiconductor light emitting device downsized by devising arrangement of connection pads is provided. A second light emitting device is layered on a first light emitting device. The second light emitting device has a stripe-shaped semiconductor layer formed on a second substrate on the side facing to a first substrate, a stripe-shaped p-side electrode supplying a current to the semiconductor layer, stripe-shaped opposed electrodes that are respectively arranged oppositely to respective p-side electrodes of the first light emitting device and electrically connected to the p-side electrodes of the first light emitting device, connection pads respectively and electrically connected to the respective opposed electrodes, and a connection pad electrically connected to the p-side electrode. The connection pads are arranged in parallel with the opposed electrodes.Type: GrantFiled: April 13, 2012Date of Patent: July 23, 2013Assignee: Sony CorporationInventors: Yuji Furushima, Abe Hiroaki, Kudou Hisashi, Fujimoto Tsuyoshi, Kentaro Aoshima
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Patent number: 8253150Abstract: A semiconductor light emitting device capable of precisely detecting a cleavage position is provided. A second light emitting device is layered on a first light emitting device. The second light emitting device has stripe-shaped opposed electrodes that are respectively arranged oppositely to respective p-side electrodes of the first light emitting device and electrically connected to the p-side electrodes of the first light emitting device, connection pads respectively and electrically connected to the respective opposed electrodes, a connection pad electrically connected to a p-side electrode, and marks arranged with one end in the plain face of cleavage face S3 or cleavage face S4 on an insulating layer formed on the side of a second substrate facing to a first substrate.Type: GrantFiled: October 22, 2007Date of Patent: August 28, 2012Assignee: Sony CorporationInventors: Yuji Furushima, Tetsuya Konno, Fujimoto Tsuyoshi
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Publication number: 20120205680Abstract: A semiconductor light emitting device downsized by devising arrangement of connection pads is provided. A second light emitting device is layered on a first light emitting device. The second light emitting device has a stripe-shaped semiconductor layer formed on a second substrate on the side facing to a first substrate, a stripe-shaped p-side electrode supplying a current to the semiconductor layer, stripe-shaped opposed electrodes that are respectively arranged oppositely to respective p-side electrodes of the first light emitting device and electrically connected to the p-side electrodes of the first light emitting device, connection pads respectively and electrically connected to the respective opposed electrodes, and a connection pad electrically connected to the p-side electrode. The connection pads are arranged in parallel with the opposed electrodes.Type: ApplicationFiled: April 13, 2012Publication date: August 16, 2012Applicant: SONY CORPORATIONInventors: Yuji Furushima, Abe Hiroaki, Kudou Hisashi, Fujimoto Tsuyoshi, Kentaro Aoshima
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Patent number: 8243769Abstract: A semiconductor light emitting device downsized by devising arrangement of connection pads is provided. A second light emitting device is layered on a first light emitting device. The second light emitting device has a stripe-shaped semiconductor layer formed on a second substrate on the side facing to a first substrate, a stripe-shaped p-side electrode supplying a current to the semiconductor layer, stripe-shaped opposed electrodes that are respectively arranged oppositely to respective p-side electrodes of the first light emitting device and electrically connected to the p-side electrodes of the first light emitting device, connection pads respectively and electrically connected to the respective opposed electrodes, and a connection pad electrically connected to the p-side electrode. The connection pads are arranged in parallel with the opposed electrodes.Type: GrantFiled: October 29, 2007Date of Patent: August 14, 2012Assignee: Sony CorporationInventors: Yuji Furushima, Abe Hiroaki, Kudou Hisashi, Fujimoto Tsuyoshi, Kentaro Aoshima
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Publication number: 20080151960Abstract: A semiconductor light emitting device downsized by devising arrangement of connection pads is provided. A second light emitting device is layered on a first light emitting device. The second light emitting device has a stripe-shaped semiconductor layer formed on a second substrate on the side facing to a first substrate, a stripe-shaped p-side electrode supplying a current to the semiconductor layer, stripe-shaped opposed electrodes that are respectively arranged oppositely to respective p-side electrodes of the first light emitting device and electrically connected to the p-side electrodes of the first light emitting device, connection pads respectively and electrically connected to the respective opposed electrodes, and a connection pad electrically connected to the p-side electrode. The connection pads are arranged in parallel with the opposed electrodes.Type: ApplicationFiled: February 19, 2008Publication date: June 26, 2008Inventors: Yuji Furushima, Abe Hiroaki, Kudou Hisashi, Fujimoto Tsuyoshi, Kentaro Aoshima
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Publication number: 20080111142Abstract: A semiconductor light emitting device capable of precisely detecting a cleavage position is provided. A second light emitting device is layered on a first light emitting device. The second light emitting device has stripe-shaped opposed electrodes that are respectively arranged oppositely to respective p-side electrodes of the first light emitting device and electrically connected to the p-side electrodes of the first light emitting device, connection pads respectively and electrically connected to the respective opposed electrodes, a connection pad electrically connected to a p-side electrode, and marks arranged with one end in the plain face of cleavage face S3 or cleavage face S4 on an insulating layer formed on the side of a second substrate facing to a first substrate.Type: ApplicationFiled: October 22, 2007Publication date: May 15, 2008Inventors: Yuji Furushima, Tetsuya Konno, Fujimoto Tsuyoshi
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Patent number: 6670203Abstract: In the pattern of a selective growth mask for directly forming an active layer, open stripes for growing recombination layers to be inserted into a current blocking are formed in addition to an open stripe for growing the active layer. By this mask pattern, the position and band gap of the recombination layers are controlled. Whereby, at an arbitrary position in the vicinity of the active layer, recombination layers having an arbitrary band gap can be batch formed together with the active layer. Thus, a semiconductor laser element with an excellent high-temperature high-output characteristic can be fabricated with good uniformity and reproducibility.Type: GrantFiled: November 28, 2001Date of Patent: December 30, 2003Assignee: NEC CorporationInventor: Yuji Furushima
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Patent number: 6539039Abstract: An optical semiconductor device is a buried hetero structure type, and includes a semi-insulating semiconductor block layer, a carrier trap layer, and a clad layer and a contact layer. Each of the clad layer and the contact layer is formed by selective growth. The carrier trap layer and the semi-insulating block layer have an etched mesa-structure.Type: GrantFiled: April 12, 2001Date of Patent: March 25, 2003Assignee: NEC CorporationInventor: Yuji Furushima
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Patent number: 6477283Abstract: An impurity diffusion preventing layer is provided between a first upper clad layer adjacent to an optical absorption layer and a second upper clad layer provided on the first upper clad layer in order to prevent p type impurity from diffusing to the first upper clad layer adjacent to the optical absorption layer.Type: GrantFiled: July 7, 2000Date of Patent: November 5, 2002Assignee: NEC CorporationInventors: Junichi Shimizu, Yuji Furushima
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Patent number: 6465269Abstract: A semiconductor optical device has a gain region for oscillating a laser light beam and a spot-size conversion region for converting a spot-size of the laser light beam emitted from the gain region. Further, an optical waveguide is formed by the use of a selective growth mask along the gain region and the spot-size conversion region. With such a structure, the optical waveguide includes a waveguide taper portion and has a width and a facet. In this event, the width gradually becomes narrower towards the facet. As a result, the waveguide taper portion is tapered along a direction from the gain region towards the facet.Type: GrantFiled: February 16, 2001Date of Patent: October 15, 2002Assignee: NEC CorporationInventor: Yuji Furushima
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Publication number: 20020075927Abstract: In the pattern of a selective growth mask for directly forming an active layer, open stripes for growing recombination layers to be inserted into a current blocking are formed in addition to an open stripe for growing the active layer. By this mask pattern, the position and band gap of the recombination layers are controlled. Whereby, at an arbitrary position in the vicinity of the active layer, recombination layers having an arbitrary band gap can be batch formed together with the active layer. Thus, a semiconductor laser element with an excellent high-temperature high-output characteristic can be fabricated with good uniformity and reproducibility.Type: ApplicationFiled: November 28, 2001Publication date: June 20, 2002Applicant: NEC CORPORATIONInventor: Yuji Furushima
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Patent number: 6337870Abstract: In the pattern of a selective growth mask for directly forming an active layer, open stripes for growing recombination layers to be inserted into a current blocking are formed in addition to an open stripe for growing the active layer. By this mask pattern, the position and band gap of the recombination layers are controlled. Whereby, at an arbitrary position in the vicinity of the active layer, recombination layers having an arbitrary band gap can be batch formed together with the active layer. Thus, a semiconductor laser element with an excellent high-temperature high-output characteristic can be fabricated with good uniformity and reproducibility.Type: GrantFiled: October 20, 1998Date of Patent: January 8, 2002Assignee: NEC CorporationInventor: Yuji Furushima
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Publication number: 20010030327Abstract: An optical semiconductor device is a buried hetero structure type, and includes a semi-insulating semiconductor block layer, a carrier trap layer, and a clad layer and a contact layer. Each of the clad layer and the contact layer is formed by selective growth. The carrier trap layer and the semi-insulating block layer have an etched mesa-structure.Type: ApplicationFiled: April 12, 2001Publication date: October 18, 2001Applicant: NEC CORPORATIONInventor: Yuji Furushima