Abstract: In microcomputers and digital signal processors in which a central processing unit for controlling the entire system and a digital signal processing unit having a product sum function required to process digital signals efficiently are mounted on one and the same chip, an increase in the number of processing steps caused by differing types of data handled by the calculators is prevented, thereby enhancing the efficiency of the digital signal processing.

Abstract: A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units are required for data input and output of the DSP and CPU. As a result, an extraneous communication overhead occurs between the DSP and the CPU. The invention realizes a mobile communication terminal system by a DSP/CPU integrated chip comprising a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. The memory systems and the peripheral circuits of the DSP and the CPU can thus be integrated to realize a mobile communication terminal system low in cost and power consumption and small in size.

Abstract: A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units are required for data input and output of the DSP and CPU. As a result, an extraneous communication overhead occurs between the DSP and the CPU. The invention realizes a mobile communication terminal system by a DSP/CPU integrated chip comprising a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. The memory systems and the peripheral circuits of the DSP and the CPU can thus be integrated to realize a mobile communication terminal system low in cost and power consumption and small in size.

Abstract: A method of operating a basic industrial plant complex efficiently utilizing energy, products, byproducts, and waste materials between the basic industrial plants as a whole to totally improve energy efficiency and contribute to energy saving. The basic industrial plant complex comprises basic industrial plants including an oil refining plant, an oil-fired power plant, a cement plant, a steelmaking plant constructed so as to be in close proximity to or adjacent to each other. The basic industrial plants are combined through a transporter for partially or completely supplying product, byproduct or waste material from a plant in the complex as a fuel, power source, and/or raw material to products for another plant in the complex.

Abstract: A low cost, a low power consumption and a small size are three very important factors for a mobile communication terminal. A great problem is posed by the conventional technique using a DSP and a CPU independent of each other which requires two external memory systems. Also, two peripheral units are required for data input and output of the DSP and CPU. As a result, an extraneous communication overhead occurs between the DSP and the CPU. The invention realizes a mobile communication terminal system by a DSP/CPU integrated chip comprising a DSP/CPU core (500) integrated as a single bus master, an integrated external bus interface (606) and an integrated peripheral circuit interface. The memory systems and the peripheral circuits of the DSP and the CPU can thus be integrated to realize a mobile communication terminal system low in cost and power consumption and small in size.

Abstract: In microcomputers and digital signal processorspin which a central processing unit for controlling the entire system and a digital signal processing unit having a product sum function required to process digital signals efficiently are mounted on one and the same chippthis invention prevents an increase in the number of processing steps caused by differing types of data handled by the calculators, thereby enhancing the efficiency of the digital signal processing.

Abstract: A bus driving system includes n bus wires having data signal wires and control signal wires, (n-1) switching circuits constituting driver circuits at a transmitting end, a precharge circuitry for precharging (n-2) bus wires and (n-1)-th bus wire with a control circuit for redistributing wire capacitances of transmission lines formed by the bus wires, and a predischarge circuitry for predischarging n-th bus wire. The switching circuits control conduction and non-conduction between (n-2) bus wires, (n-1)-th bus wire and n-th bus wire, wherein the (n-2) switching circuits respond to (n-2) bit signals and a control signal, while the (n-1)-th switching circuit responds to the control signal. The signal from the transmitting end is detected by a detection circuit at a receiving end via the transmission lines.

Abstract: In microcomputers and digital signal processors in which a central processing unit for controlling the entire system and a digital signal processing unit having a product sum function required to process digital signals efficiently are mounted on one and the same chippthis invention prevents an increase in the number of processing steps caused by differing types of data handled by the calculators, thereby enhancing the efficiency of the digital signal processing.The digital signal processing unit is made a calculation unit that handles fixed-point data, and an instruction calling for execution of a fixed-point data calculation is provided separately from the conventional integer calculation instruction.

Abstract: A data processing system being constructed such that the amount of time a data bus of a data processor is occupied to perform predetermined data processing operations is reduced. The data processing system includes a data processor for processing data, a first memory for storing data, a second memory for storing data, a dedicated data processing circuit for performing a predetermined data processing operation on data, a data bus and first and second dedicated buses. The data bus is connected to said data processor and the first and second memories and transfers processed data from the data processor to the first memory and from the second memory to the data processor. The first dedicated bus is independent of the data bus and is connected to the circuit and the first memory and transfers processed data from the first memory to the circuit.

Abstract: In a mobile wireless communication end device having an electric power source including a cell, and a signal processing part and a transmitting-receiving part, to which electric power is applied from the electric power source, operation is performed in operation mode selected previously by the user when voltage of the electric power source is dropped. The signal processing part and the transmitting-receiving part have a normal operation mode operating at normal electric power and a low power operation mode operating at electric power lower than the normal operation mode.

Abstract: A DC powered integrated circuit includes a plurality of magnetic flux coupling type Josephson elements. First and second Josephson elements are connected in series to form a first element series circuit of Josephson elements. Third and fourth Josephson elements are connected in series to form a second element series circuit of Josephson elements. The first and second element series circuits are connected in series to form a huffle circuit, with a load inductance, three resistors and a DC current source.

Abstract: A superconducting logic circuit including a first power source terminal connected with a current source; a second power source terminal connected with a current sink; a first superconducting switching device connected between said first power source terminal and ground; a second superconducting switching device connected between said second power source terminal and ground; first and second resistors connected with said first and second power source terminals, respectively; and third and fourth resistors connected with the control terminals of said first and second superconducting switching devices, respectively, wherein the other terminals of said first and second resistors are connected with each other to provide a logic output terminal, and wherein the other terminals of said third and fourth resistors are connected with each other to provide a logic input terminal.