Patents by Inventor Yuji Iseki

Yuji Iseki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160295710
    Abstract: For achieving this object, the present invention includes a body case (4), and an electric circuit board (18) disposed inside the body case (4). The body case (4) includes a carbon fiber sheet (12), a resin layer (13) covering the sheet (12), and a conductive nut (14) fixed to the sheet (12) with caulking. The electric circuit board (18) includes an earth pattern (19), and a through hole (20) provided in the earth pattern (19) or in a vicinity of the earth pattern (19). A conductive bolt (22) is fastened through the through hole (20) of the electric circuit board (18) into the nut (14) from a side opposite to the nut (14) to electrically connect the earth pattern (19) of the electric circuit board (18) with the sheet (12) of the body case (4) via the nut (14).
    Type: Application
    Filed: July 10, 2014
    Publication date: October 6, 2016
    Inventors: TOMOKI UEYAMA, KENJI TAKAYAMA, KATSUHIKO SAKUMA, YUJI ISEKI
  • Publication number: 20100025060
    Abstract: A silicon lump crushing tool comprising a pneumatic piston drive means for driving a piston installed in a casing from a retreat position to a projection position by air pressure, a guide tube connected to the casing and extending in the movement direction of the piston, and a hammer head. The rear end portion of the hammer head is movably inserted into the front end portion of the guide tube, and when the piston is driven from the retreat position to the projection position, the front end of the piston collides with the rear end of the hammer head.
    Type: Application
    Filed: October 11, 2007
    Publication date: February 4, 2010
    Inventors: Yasuo Yamane, Keiji Yamada, Yuji Iseki, Manabu Kondou
  • Publication number: 20050261036
    Abstract: In a radio equipment of portable type, the impedance of an antenna is optimized by adjusting a matching circuit which has the adjustment function and is connected to an antenna, based on a reflection phase sent back from the antenna, outputted from a reflection phase detector, and a current supplied to a transmitter-receiver which generates a transmitting signal.
    Type: Application
    Filed: July 18, 2005
    Publication date: November 24, 2005
    Inventors: Shu-ichi Sekine, Takayoshi Itoh, Yuji Iseki, Naoko Ono, Keiichi Yamaguchi, Hiroyuki Kayano, Akihiro Tsujimura, Kazuhiro Inoue, Noriaki Odachi, Yasushi Murakami
  • Patent number: 6934557
    Abstract: In a radio equipment of portable type, the impedance of an antenna is optimized by adjusting a matching circuit which has the adjustment function and is connected to an antenna, based on a reflection phase sent back from the antenna, outputted from a reflection phase detector, and a current supplied to a transmitter-receiver which generates a transmitting signal.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: August 23, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shu-ichi Sekine, Takayoshi Itoh, Yuji Iseki, Naoko Ono, Keiichi Yamaguchi, Hiroyuki Kayano, Akihiro Tsujimura, Kazuhiro Inoue, Noriaki Odachi, Yasushi Murakami
  • Publication number: 20030060227
    Abstract: In a radio equipment of portable type, the impedance of an antenna is optimized by adjusting a matching circuit which has the adjustment function and is connected to an antenna, based on a reflection phase sent back from the antenna, outputted from a reflection phase detector, and a current supplied to a transmitter-receiver which generates a transmitting signal.
    Type: Application
    Filed: September 27, 2002
    Publication date: March 27, 2003
    Inventors: Shu-ichi Sekine, Takayoshi Itoh, Yuji Iseki, Naoko Ono, Keiichi Yamaguchi, Hiroyuki Kayano, Akihiro Tsujimura, Kazuhiro Inoue, Noriaki Odachi, Yasushi Murakami
  • Patent number: 6455880
    Abstract: A high frequency semiconductor device has a semiconductor substrate such as the semi-insulating GaAs; a first metal layer disposed above the semiconductor substrate; a first dielectric thin film disposed on the first metal layer; and a second metal layer having a second metal strip disposed on the first dielectric thin film. Here, the first metal layer has a first metal strip, first and second ground metal plates sandwiching the first metal strip. And the first dielectric thin film is not disposed uniformly on the surface of the first ground metal plate so that the dielectric structure on the first metal strip differs from the dielectric structure under the second metal strip. The CPW is constituted by the first metal strip, the first and second ground metal plates, and the TFMSL is constituted by the second metal strip and the first ground metal plate.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: September 24, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Ono, Yuji Iseki, Keiichi Yamaguchi, Junko Onomura, Eiji Takagi
  • Publication number: 20020036345
    Abstract: The semiconductor device embraces a module substrate; a plurality of substrate-cite interconnects disposed on the first main surface of the module substrate; a semiconductor chip mounted with the flip chip configuration; a plurality of joints connected to the substrate-cite interconnects; a circuit board; a plurality of board-cite interconnects disposed on the top surface of the circuit board, each being connected to one of the joints; and a first heat conductive material thermally connecting the bottom surface of the semiconductor chip with the top surface of the circuit board.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 28, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuji Iseki, Naoko Ono, Keiichi Yamaguchi
  • Patent number: 6263193
    Abstract: A microwave transmitter/receiver module has a package that includes a high-frequency circuit board and an electromagnetically narrowed space. A semiconductor chip is mounted on the circuit board and is contained in the electromagnetically narrowed space. The electromagnetically narrowed space has a cutoff frequency that is higher than a carrier frequency for microwave communication. A receiver antenna pattern is formed on the top surface of the package and is electromagnetically connected to the semiconductor chip through a first slot. A transmitter antenna pattern is formed on the top surface of the package at a different position from the receiver antenna pattern and is electromagnetically connected to the semiconductor chip through a second slot. Since the antenna patterns are on the top surface of the package, the proper performance thereof is secured and the package is compact.
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: July 17, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuji Iseki, Keiichi Yamaguchi, Mitsuo Konno
  • Patent number: 5914536
    Abstract: A semiconductor device includes a wiring board having a main surface and a plurality of pad electrodes formed on the main surface, a rectangular semiconductor element having a main surface facing the main surface of the wiring board and mounted on the main surface of the wiring board, a solder resist formed to surround the semiconductor element with a preset distance therefrom on the main surface of the wiring board, a plurality of terminal electrodes formed on the end portion of the main surface of the semiconductor element, and a plurality of solder bumps for electrically connecting the plurality of pad electrodes to the plurality of terminal electrodes with a gap provided between the main surface of the wiring board and the main surface of the semiconductor element, wherein each of the plurality of pad electrodes includes at least a portion which extends from substantially under a corresponding one of the plurality of terminal electrodes of the semiconductor element to the solder resist lying outside the s
    Type: Grant
    Filed: July 5, 1996
    Date of Patent: June 22, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasushi Shizuki, Yuji Iseki, Naoko Ono, Kunio Yoshihara, Masayuki Saito, Hiroshi Yamada, Kazuki Tateyama
  • Patent number: 5898909
    Abstract: Disclosed is an ultra high frequency radio communication apparatus having: a receiver antenna; a transmitter antenna; an IC chip being electrically connected to the receiver antenna and the transmitter antenna; a substrate on which the receiver antenna, the transmitter antenna and the IC chip are mounted; an input terminal for inputting to the IC chip a base band input signal; an output terminal for outputting a base band output signal from the IC chip; and a control signal terminal for inputting a control signal for controlling the IC chip to the IC chip. The IC chip is placed in a shielding space such that the cut-off frequency of the shielding space is higher than the frequency of a carrier signal for radio communication.
    Type: Grant
    Filed: September 27, 1996
    Date of Patent: April 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kunio Yoshihara, Kouhei Morizuka, Mitsuo Konno, Yasuo Ashizawa, Junko Akagi, Yasuhiro Kuriyama, Motoyasu Morinaga, Eiji Takagi, Yasushi Shizuki, Yuji Iseki, Takeshi Hanawa, Takeshi Miyagi
  • Patent number: 5818113
    Abstract: A semiconductor device wherein a sealing resin is filled in a space between an interconnecting wiring board and a semiconductor chip after the semiconductor chip is flip chip-mounted on the wiring board in which at least a non-planar region consisting of a through hole, a concave portion or a convex portion, or a region exhibiting poor wettability to the sealing resin is formed on the surface of the wiring board or the semiconductor chip so as to provide a void in the sealed resin filled between the wiring board and the semiconductor chip for the purpose of minimizing any bad influence from the sealing resin on the interconnecting wirings or elements formed on the semiconductor chip.
    Type: Grant
    Filed: September 12, 1996
    Date of Patent: October 6, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuji Iseki, Yasushi Shizuki, Hiroshi Yamada, Takashi Togasaki, Kunio Yoshihara
  • Patent number: 5764119
    Abstract: A wiring board for high-frequency signals, which comprises, a substrate, a dielectric layer formed on the substrate and provided on its surface with a U-shaped groove having an arcuate bottom for forming a wiring therein, and a signal wiring formed in the U-shaped groove, which is featured in that an upper end portion of the signal wiring is protruded out of the surface of the dielectric layer. A distance (H) from a protruded top surface of the signal wiring to a bottom of the U-shaped groove and a width (W) of the U-shaped groove preferably meet a relationship of 2<(W/H)<50, and the height of the portion of signal wiring which is protruded out of the surface of the dielectric layer is preferably in the range of 10 nm to 10 .mu.m.
    Type: Grant
    Filed: October 3, 1996
    Date of Patent: June 9, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Miyagi, Yuji Iseki, Yasushi Shizuki, Kunio Yoshihara, Masayuki Saito, Kazuhito Higuchi, Takeshi Hanawa, Eiji Takagi
  • Patent number: 5694030
    Abstract: Disclosed is a dc-to-dc converter comprising a switching transistor, a pulse-width modulation controller, a sandwich-type planar inductor, which accumulates an electromagnetic energy at ON state and releases the accumulated electromagnetic energy at OFF state of the switching transistor, a smoothing capacitor, a rectifying element, and a planar search coil for detecting an overcurrent flowing the planar coil, disposed on one of the outer surfaces of the soft magnetic layers constituting the planar inductor.
    Type: Grant
    Filed: September 16, 1996
    Date of Patent: December 2, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Kunio Matsukura, Isamu Yanase, Yuji Iseki, Tetsuhiko Mizoguchi, Yuji Ide, Michio Hasegawa, Yoshihiko Yamaguchi, Yasunori Iwamoto
  • Patent number: 5631809
    Abstract: A semiconductor device comprising a semiconductor chip, a sheet-like metal member electrically connected to a major surface of the semiconductor chip and serving as a ground electrode for the chip, and input/output electrodes electrically connected to the semiconductor chip and situated in the same plane as that of the sheet-like metal member, the chip, the metal member, and the input/output electrodes being encapsulated in an electrically insulating member having a bottom surface and adapted to be mounted on a surface of a circuit board. The sheet-like metal member is brought out from inside the electrically insulating member without being bent and has its one end face situated in substantially the same plane as the bottom surface of the electrically insulating member which faces to the surface of the circuit board when the metal member is mounted on the circuit board and the major surface of the chip is approximately prependicular to the end face of the sheet-like metal member.
    Type: Grant
    Filed: September 13, 1994
    Date of Patent: May 20, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Eiji Takagi, Yuji Iseki, Naoko Ono
  • Patent number: 5614141
    Abstract: A laminated film is obtained by laminating, through a liquid crystal polymer layer, a thermoplastic polymer layer which is adhesive to the liquid crystal polymer layer, on a thermoplastic polymer layer which is not adhesive to the liquid crystal polymer layer, such lamination being made in a co-extrusion molding machine, by extruding the laminated layers from a die and by separating the non-adhesive thermoplastic polymer layer from the liquid crystal polymer layer. The adhesive thermoplastic polymer layer is preferably formed by a modified polyolefin into which a functional group is being introduced. The non-adhesive thermoplastic polymer layer is preferably formed by an olefin polymer or a polyalkylene terephthalate.
    Type: Grant
    Filed: November 16, 1994
    Date of Patent: March 25, 1997
    Assignee: Daicel Chemical Industries, Ltd.
    Inventors: Katsuhiko Sumida, Yuji Iseki, Masahiko Suzuki
  • Patent number: 5583424
    Abstract: Disclosed is a dc-to-dc converter comprising a switching transistor, a pulse-width modulation controller, a sandwich-type planar inductor, which accumulates an electromagnetic energy at ON state and releases the accumulated electromagnetic energy at OFF state of the switching transistor, a smoothing capacitor, a rectifying element, and a planar search coil for detecting an overcurrent flowing the planar coil, disposed on one of the outer surfaces of the soft magnetic layers constituting the planar inductor.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: December 10, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiro Sato, Kunio Matsukura, Isamu Yanase, Yuji Iseki, Tetsuhiko Mizoguchi, Yuji Ide, Michio Hasegawa, Yoshihiko Yamaguchi, Yasunori Iwamoto
  • Patent number: 5405565
    Abstract: A laminated film is obtained by laminating, through a liquid crystal polymer layer, a thermoplastic polymer layer which is adhesive to the liquid crystal polymer layer, on a thermoplastic polymer layer which is not adhesive to the liquid crystal polymer layer, such lamination being made in a co-extrusion molding machine, by extruding the laminated layers from a die and by separating the non-adhesive thermoplastic polymer layer from the liquid crystal polymer layer. The adhesive thermoplastic polymer layer is preferably formed by a modified polyolefin into which a functional group is being introduced. The non-adhesive thermoplastic polymer layer is preferably formed by an olefin polymer or a polyalkylene terephthalate.
    Type: Grant
    Filed: May 28, 1992
    Date of Patent: April 11, 1995
    Assignee: Daicel Chemical Industries, Ltd.
    Inventors: Katsuhiko Sumida, Yuji Iseki, Masahiko Suzuki
  • Patent number: 5364669
    Abstract: A composite film comprising, at least, a liquid crystal polymer layer containing a thermotropic liquid crystal polymer, and a thermoplastic polymer layer laminated on at least one surface of the liquid crystal polymer layer. The thermoplastic polymer layer may be formed with an adhesive thermoplastic polymer layer having adhesive properties with respect to the liquid crystal polymer layer. The adhesive thermoplastic polymer layer is formed preferably by a modified polyolefin into which a functional group is being introduced, or a modified polyester, A thermoplastic polymer layer such as a polyalkylene terephthalate layer or olefin polymer layer may further be laminated on the adhesive thermoplastic polymer layer.
    Type: Grant
    Filed: May 28, 1992
    Date of Patent: November 15, 1994
    Assignee: Daicel Chemical Industries, Ltd.
    Inventors: Katsuhiko Sumida, Yuji Iseki, Masahiko Suzuki
  • Patent number: 4948844
    Abstract: Disclosed is a process for the preparation of a perfluorinated copolymer having a predetermined ratio of monomer units, which comprises copolymerizing 99.5 to 50 mole % of (I) tetrafluoroethylene with 0.5 to 50 mole % of (II) a monomer represented by the following general formula:CF.sub.2 =CFOCH.sub.2 C.sub.n F.sub.l X.sub.m H.sub.(2n+1-l-m) (II)wherein X stands for --Cl or --Br, n is an integer of at least 0, l is an integer of from 0 to (2n+1), m is 0 or 1, and the relation of l+m.ltoreq.2n+1 is established, in the state where both the monomers are dissolved at a predetermined monomer ratio in an organic solvent, to thereby form a copolymer comprising units of the monomers at a ratio substantially equal to said predetermined monomer ratio, and fluorinating said copolymer with molecular fluorine.The heat resistance is highly improved in the copolymer obtained according to this process without degradation of other physical properties, and generation of hydrogen fluoride by heat is hardly caused.
    Type: Grant
    Filed: April 14, 1989
    Date of Patent: August 14, 1990
    Assignee: Tokuyama Soda Kabushiki Kaisha
    Inventors: Akihiko Nakahara, Yuji Iseki, Kouichi Murata
  • Patent number: 4680355
    Abstract: A fluorine-containing polymer film is prepared by flow-casting a fluorine-containing vinyl monomer, which is liquid under polymerization conditions, in the form of a film having a thickness of up to 1 mm and polymerizing the flow-cast monomer.
    Type: Grant
    Filed: July 31, 1986
    Date of Patent: July 14, 1987
    Assignee: Tokuyama Soda Kabushiki Kaisha
    Inventors: Akihiko Nakahara, Kuniaki Takata, Yuji Iseki