Patents by Inventor Yuji Kakuta
Yuji Kakuta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090288852Abstract: An electronic device of the present invention has a substrate; an electro-conductive pattern (electrodes) provided over the substrate; a semiconductor chip mounted over the substrate, and electrically connected with the electrodes; a resin cap provided over the substrate and composed of two or more resin layers to hollow-sealing the semiconductor chip; and an adhesive layer (metal-resin adhesion maintenance layer) bonding the resin cap with the electrode.Type: ApplicationFiled: April 27, 2009Publication date: November 26, 2009Applicant: NEC Electronics CorporationInventors: Tomoaki Hirokawa, Makoto Matsunoshita, Yuji Kakuta, Naoki Sakura
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Publication number: 20080094815Abstract: An electronic device that enables securing excellent hollow structure and close air-tightness of the space between the substrate and the electronic component, without incurring degradation in production efficiency, is to be provided. The electronic device includes a mounting substrate, an electronic component mounted on the mounting substrate, and a resin film provided all over the mounting substrate, so as to cover the electronic component. The resin film has a shear viscosity equal to or more than 100 kPa·s and equal to or less than 1000 kPa·s and a flow length equal to or more than 100 ?m and equal to or less than 1500 ?m.Type: ApplicationFiled: October 23, 2007Publication date: April 24, 2008Applicant: NEC ELECTRONICS CORPORATIONInventors: Yuji KAKUTA, Hiroshi MIZUTANI
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Patent number: 6501335Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.Type: GrantFiled: August 22, 2001Date of Patent: December 31, 2002Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Patent number: 6476679Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.Type: GrantFiled: August 22, 2001Date of Patent: November 5, 2002Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Patent number: 6437634Abstract: A semiconductor circuit includes an amplifying circuit and compensates the distortion characteristic in the event of changes in the ambient temperature. If the amplifying circuit is a field effect transistor (FET) amplifying circuit having a grounded source, a compensating circuit in which a thermistor having a negative temperature characteristic and a thermistor having a positive temperature characteristic are connected in a series is provided between the grounding point and the source of the FET to compensate distortion of signals outputted from the FET that is caused by the ambient temperature. The temperature at which distortion is considered a minimum is taken as the reference temperature, and the drain current that flows at this reference temperature is made a minimum such that the drain current increases as the ambient temperature deviates from the reference temperature, thereby suppressing or preventing increase in distortion in the event of changes in the ambient temperature.Type: GrantFiled: November 19, 1998Date of Patent: August 20, 2002Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Patent number: 6388527Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.Type: GrantFiled: August 22, 2001Date of Patent: May 14, 2002Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Publication number: 20020005761Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.Type: ApplicationFiled: August 22, 2001Publication date: January 17, 2002Applicant: NEC CORPORATIONInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Publication number: 20010052821Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.Type: ApplicationFiled: August 22, 2001Publication date: December 20, 2001Applicant: NEC CORPORATIONInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Publication number: 20010043121Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.Type: ApplicationFiled: November 19, 1998Publication date: November 22, 2001Inventors: YUJI KAKUTA, YOSHIAKI FUKASAWA, YUICHI TAGUCHI
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Patent number: 6313706Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.Type: GrantFiled: November 19, 1998Date of Patent: November 6, 2001Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Patent number: 6278313Abstract: A semiconductor circuit includes an amplifying circuit and compensates the distortion characteristic in the event of changes in the ambient temperature. If the amplifying circuit is a field effect transistor (FET) amplifying circuit having a grounded source, a compensating circuit in which a thermistor having a negative temperature characteristic and a thermistor having a positive temperature characteristic are connected in a series is provided between the grounding point and the source of the FET to compensate distortion of signals outputted from the FET that is caused by the ambient temperature. The temperature at which distortion is considered a minimum is taken as the reference temperature, and the drain current that flows at this reference temperature is made a minimum such that the drain current increases as the ambient temperature deviates from the reference temperature, thereby suppressing or preventing increase in distortion in the event of changes in the ambient temperature.Type: GrantFiled: June 12, 2000Date of Patent: August 21, 2001Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Patent number: 6147557Abstract: Compensating for fluctuations in the gain characteristic of the gain slope in the event of changes in ambient temperature without increasing circuit scale or adding to costs. A thermistor, which is a thermally sensitive resistance element in which resistance changes with a negative temperature characteristic according to the ambient temperature, is employed as the gate resistance of an FET, and the circuit functions such that fluctuations in the gain characteristic of the gain slope with respect to ambient temperature are canceled out by fluctuations in the value of Q with respect to the ambient temperature, thereby compensating for fluctuations in the gain slope characteristic in the event of changes in the ambient temperature.Type: GrantFiled: November 19, 1998Date of Patent: November 14, 2000Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi
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Patent number: 6111465Abstract: An input transformer, used as a transmission-line transformer (11), is provided for connection between an unbalanced transmission line (10) and a balanced broadband amplifier (12), in which the input transformer has a fixed middle potential. The transmission-line transformer (11) converts an input signal into two output signals having opposite phase with respect to each other and which are supplied to the broadband amplifier (12). It is therefore possible to cancel secondary distortion in an amplifying unit. As the transmission-line transformer (11) a forced-balun type transmission-line transformer is used which has two input ports (P1, P2) and three output ports (P3, P4, P5), one (P4) of which is grounded. First and second two-wire parallel lines are arranged between the input ports and the output ports via a single glasses-shaped core. The input port and the two output ports have a respective impedance ratio of 1:(1/2):(1/2).Type: GrantFiled: October 9, 1997Date of Patent: August 29, 2000Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yasuhiro Shirakawa, Yoshiaki Wakabayashi
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Patent number: 6028487Abstract: A plurality of field effect transistors (FET's) (11, 12) are coupled in cascode connection. A drain of the final-stage FET (12) is coupled to a gate of the first-stage FET (11) through a first negative-feedback circuit (13). A drain of the first-stage FET (11) is coupled to the gate of the first-stage FET (11) through a second negative-feedback circuit (14). The first negative-feedback circuit (13) is connected to a first resistor (Rf1) while the second negative-feedback circuit (14) is connected to a second resistor (Rf2).Type: GrantFiled: September 29, 1997Date of Patent: February 22, 2000Assignee: NEC CorporationInventors: Yuji Kakuta, Yasuhiro Shirakawa, Yoshiaki Fukasawa, Yoshiaki Wakabayashi
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Patent number: 6011438Abstract: A push-pull wideband semiconductor amplifier for use in, for example, a CATV (cable television) system. The amplifier suppresses deterioration of composite second-order (CSO) distortion in output signals. The push-pull wideband amplifier includes: a divider which divides a signal inputted by way of an input terminal into two signals of differing phase, first and second amplifying circuits each of which amplifies the signal divided by the divider, and a combiner which combines the two signals amplified by the first and second amplifying circuits into one signal and outputs the result signal. The node between the first amplifying circuit and the second amplifying circuit is an imaginary ground point having a potential of 0 V from the standpoint of an alternating-current signal. A termination circuit is provided between this imaginary ground, point and ground and absorbs fluctuation in potential generated at the imaginary ground point.Type: GrantFiled: November 19, 1998Date of Patent: January 4, 2000Assignee: NEC CorporationInventors: Yuji Kakuta, Yoshiaki Fukasawa, Yuichi Taguchi