Patents by Inventor Yuji Mizuguchi

Yuji Mizuguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060129318
    Abstract: To a data reception device, a signal having a frequency of 12.5 MHz and including data is transmitted. The data reception device generates a clock B having a frequency of 400 MHz of (1) in FIG. 8, and performs sampling for the above-described 12.5 MHz signal based on the clock B ((2) in FIG. 8). Then, the data reception device detects zero cross points of the sampled data, and generates a 25 MHz frequency clock signal indicating the zero cross points ((3) in FIG. 8). Next, the data reception device generates, by delaying the generated clock signal by the time amount corresponding to eight clocks ((4) in FIG. 8), a 25 MHz signal indicating symbol points. Thus, symbol points can be detected.
    Type: Application
    Filed: December 26, 2003
    Publication date: June 15, 2006
    Inventors: Yuji Mizuguchi, Nobuhiko Yasui, Noboru Katta, Takahisa Sakai, Yutaka Takahira, Hirotsugu Kawada, Toshitomo Umei, Takashi Akita, Takefumi Yoshikawa, Shiro Dosho
  • Patent number: 7042965
    Abstract: An evaluation level setting method and a data reception apparatus in which the method is implemented accurately evaluate signal levels in multi-valued transmission for transmitting data while assigning one or more bits of data as one data symbol to a signal level. A data transmission apparatus outputs an initialization pattern signal at turn-on of power or after reset, and the data reception apparatus establishes clock synchronization on the basis of the received initialization pattern signal and starts data reception after setting of evaluation levels to be used for threshold evaluation of signal levels.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: May 9, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noboru Katta, Yuji Mizuguchi, Takahisa Sakai, Hirotsugu Kawada, Toshihiko Kurosaki
  • Publication number: 20060072624
    Abstract: In the case where transmission and reception is made impossible at a certain portion, a data transmission system configured in a ring LAN performs an initialization process for a physical layer (a transmission/reception section 4) repeatedly, thereby setting as a master a data transmission device which is located most upstream in electrical communication from a disconnection point. With that data transmission device being the master, an initial setting of the physical layer such as a clock synchronization with another data transmission device or the like is established, and an initialization process for a data link layer is performed, whereby subsequent data transmission and reception is enabled. That is, the data transmission system configured in a ring LAN is able to perform communication using transmission lines excluding a damaged point even in the case where transmission and reception is made impossible at a certain portion.
    Type: Application
    Filed: January 29, 2004
    Publication date: April 6, 2006
    Inventors: Takashi Akita, Noboru Katta, Nobuhiko Yasui, Takahisa Sakai, Yuji Mizuguchi, Yutaka Takahira, Hirotsugu Kawada, Toshitomo Umei
  • Patent number: 7012936
    Abstract: A first initialization pattern signal is a signal in which a maximum signal level and a minimum signal level appear alternately, and a second initialization pattern signal is a signal in which all signal levels appear in a predetermined arrangement. In a ring-shaped network including plural stages of data transmission apparatuses (100), a transmission unit (110) of each data transmission apparatus outputs the first initialization pattern signal successively to a next-stage data transmission apparatus at turn-on of power or immediately after reset, and a reception unit (120) establishes clock synchronization on the basis of the first initialization pattern signal received.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: March 14, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hirotsugu Kawada, Yuji Mizuguchi, Takahisa Sakai, Noboru Katta, Toshihiko Kurosaki, Nobuhiko Yasui, Yutaka Takahira
  • Publication number: 20060050820
    Abstract: A signal receiver (11) receives an analog signal via a twisted pair cable (31). An A/D converter (12) converts the analog signal to a digital signal. A phase detection unit (14) detects the phase of the digital signal, and generates a reception timing signal. A transmission timing generation unit (15) controls, based on the reception timing signal, timing for a transmission processing unit (16) to output the digital signal such that the reception signal (point A) and a transmission signal (point D) are different in phase by a predetermined degree. The transmission processing unit (16) outputs, in accordance with the timing, a digital signal obtained by performing mapping on data inputted from a connection device (20). A D/A converter (17) converts the digital signal to an analog signal. A signal transmitter (18) transmits the analog signal via a twisted pair cable (32).
    Type: Application
    Filed: February 10, 2004
    Publication date: March 9, 2006
    Inventors: Hirotsugu Kawada, Yoshiyuki Saito, Osamu Shibata, Hiroshi Suenaga, Takahisa Sakai, Toshitomo Umei, Takashi Akita, Yuji Mizuguchi, Noboru Katta
  • Publication number: 20060034388
    Abstract: A data section is mapped such that the polarity of the signal level of each symbol is constantly inverted on a symbol by symbol basis. On the other hand, a header section is mapped such that the header section includes a distinguishing symbol for distinguishing the data section and the header section from each other, and such that the signal level of the distinguishing symbol is equal to the signal level of the symbol which is mapped immediately before the distinguishing symbol. Thus, data transfer, by which the header section and the data section can be distinguished from each other with certainty by an apparatus on the receiving side, is made possible.
    Type: Application
    Filed: January 28, 2004
    Publication date: February 16, 2006
    Inventors: Yuji Mizuguchi, Nobuhiko Yasui, Noboru Katta, Takahisa Sakai, Yutaka Takahira, Hirotsugu Kawada, Toshitomo Umei, Takashi Akita
  • Patent number: 6992537
    Abstract: A receiver includes a noise reduction circuit for eliminating noise from a differential signal transmitted through a differential transmission line, and a data recovery circuit for recovering data from a differential signal outputted from the noise reduction circuit. The noise reduction circuit includes common-mode chokes for reflecting common-mode noise superimposed on an input differential signal, and a common-mode noise reduction circuit for directing the common-mode noise reflected by the common-mode chokes to a low potential point of the common-mode noise reduction circuit.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: January 31, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuhiko Yasui, Noboru Katta, Takahisa Sakai, Yuji Mizuguchi, Yutaka Takahira, Hirotsugu Kawada, Toshitomo Umei, Takashi Akita, Osamu Shibata
  • Patent number: 6972796
    Abstract: A control device determines whether an image generated by merging several concurrently picked-up images has consistent image quality on a display device. If determined No, image quality parameters set in each image pickup device are so controlled as to make the image quality of the merged image consistent. Therefore, the merged image can assuredly have consistent image quality. Further, a signal processing device detects, based on positions of nodes and attributes of cameras, a connection indicating which node is connected to which camera and with what attribute. The signal processing device in advance stores every detectable connection and a plurality of image processing programs corresponding to each connection, and selects and carries out one of the image processing programs corresponding to the detected connection.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: December 6, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noboru Katta, Hirotsugu Kawata, Susumu Ibaraki, Takahisa Sakai, Toshiaki Mori, Akihiro Yamamoto, Toshihiko Kurosaki, Yuji Mizuguchi
  • Publication number: 20050265262
    Abstract: A data transmission device (1) includes a controller (2), a reception section (5), a transmission section (6), and an MPU (3). The reception section (5) receives an electric signal sent from a preceding device, and outputs its data to the controller (2). The transmission section (6) converts a result of a process by the controller (2) into an electric signal and transmits it to a successive device. The MPU (3) controls operation of the controller (2), the reception section (5), and the transmission section (6) in accordance with the operation mode of the device. The reception section (5) detects cessation of the electric signal sent from the preceding device and, in response to the detection, stops operating. In response to the detection, the transmission section (6) stops operating and stops sending the electric signal to the successive device.
    Type: Application
    Filed: December 24, 2003
    Publication date: December 1, 2005
    Inventors: Yuji Mizuguchi, Nobuhiko Yasui, Noboru Katta, Takahisa Sakai, Yutaka Takahira, Hirotsugu Kawada, Toshitomo Umei, Takashi Akita
  • Patent number: 6961345
    Abstract: A data transmission system including first and second source devices for transmitting video data (isochronous data) outputted from first and second data output units, and a sink device for receiving the video data transmitted from the source devices and outputting the data to a video composition device, in which the video data supplied from the data output units to the source device are synchronized in frame units and transmitted from the source devices to one sink device. In the data transmission system, synchronous information (reference signal information) in the video composition device is transmitted from the sink device to the source devices, and timing reference signals in the data output units are generated by the source devices based on the synchronous information.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: November 1, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuji Mizuguchi, Takahisa Sakai, Toshihisa Ikeda
  • Publication number: 20050083863
    Abstract: Initialization processes of link layers in a data transmission system are started after initialization processes of respective physical layers are completed. Thus, at the time of initialization of the link layers, the respective physical layers can perform communication with each other. As a result, in the data transmission system in which electrical communication is performed, an initialization program (an API which is supplied assuming that physical layers requiring no initialization process are used) designed assuming that physical layers are in a state where they can perform communication during an initialization period of link layers can be used while satisfying the above assumption.
    Type: Application
    Filed: February 13, 2004
    Publication date: April 21, 2005
    Inventors: Toshitomo Umei, Noboru Katta, Takahisa Sakai, Yuji Mizuguchi, Hirotsugu Kawada, Takashi Akita
  • Publication number: 20050030934
    Abstract: A data transmission system in which normal transmission can be performed irrespectively of the inserting orientation of a connector is provided. A transmitting device transmits to a receiving device a differential transmission signal including polarity decision data for deciding the polarity of the connector. Based on the polarity decision data included in the differential transmission signal transmitted from the transmitting device, the receiving device decides whether the polarity of the connector has been reversed or not. When it is decided that the polarity has not been reversed, the receiving device reads data from the differential transmission signal. When it is decided that the polarity has been reversed, the polarity of the differential transmission signal is reversed for data reading.
    Type: Application
    Filed: May 30, 2003
    Publication date: February 10, 2005
    Inventors: Yutaka Takahira, Yuji Mizuguchi, Noboru Katta, Nobuhiko Yasui, Takahisa Sakai, Hirotsugu Kawada, Toshitomo Umei
  • Publication number: 20050025226
    Abstract: A data transmission apparatus 10 for transmitting a data signal in accordance with a predetermined protocol in one direction within a ring network of a plurality of data transmission apparatuses includes: signal determination means 11 for determining a presence or absence of a data signal from an immediately upstream data transmission apparatus 10 in the ring network based on an amplitude of the data signal; and stopping means for stopping transmission of the data signal to an immediately downstream data transmission apparatus 10 if the signal determination means 11 determines that there is no incoming data signal. The data signal is a signal obtained by modulating an amplitude component of an electrical signal of a predetermined frequency. Thus, a data transmission apparatus is provided which can quickly detect a momentary power interruption in a data transmission system composed of data transmission apparatuses interconnected in a ring fashion.
    Type: Application
    Filed: February 12, 2004
    Publication date: February 3, 2005
    Inventors: Yuji Mizuguchi, Toshitomo Umei, Takashi Akita, Noboru Katta, Akihiro Kaneita, Masahiro Ohsone
  • Publication number: 20050027876
    Abstract: In a physical layer of each data transmission apparatus 1, a physical layer initialization process is performed in response to a reset exit process performed by the irrespective CPUs 4. Then, in a link layer of a master data transmission apparatus 1 and in a link layer of a data transmission apparatus 1 which operates in a normal mode, after the completion of the physical layer initialization process, a link layer initialization process is performed in response to a reset exit process performed by their respective CPUs 4, and then the data transmission apparatuses 1 start data communication using their respective physical layers and link layers. On the other hand, a link layer of a data transmission apparatus 1 which operates in a bypass mode maintains its reset state, and the data transmission apparatus 1 transmits data using only its own physical layer by bypassing its own link layer.
    Type: Application
    Filed: February 12, 2004
    Publication date: February 3, 2005
    Inventors: Toshitomo Umei, Noboru Katta, Yuji Mizuguchi, Takashi Akita
  • Publication number: 20050025496
    Abstract: If a master data transmission apparatus is included in an optical data transmission system, a clock recovered by a first clock recovery unit 91 based on an optical signal received from the optical data transmission system is selected by a clock selecting unit 93. If the master data transmission apparatus is included in an electrical data transmission system, a clock recovered by a second clock recovery unit 92 based on a lock signal received from the electrical data transmission system is selected by the clock selecting unit 93. A mapping unit 74, a digital filter 75, and a D/A converting unit 76 perform processing in accordance with the clock selected by the clock selecting unit 93.
    Type: Application
    Filed: February 19, 2004
    Publication date: February 3, 2005
    Inventors: Takashi Akita, Noboru Katta, Takahisa Sakai, Yuji Mizuguchi, Hirotsugu Kawada, Toshitomo Umei, Yutaka Takahira
  • Patent number: 6839006
    Abstract: An S/P converter 120 converts input data from serial to parallel for every two bits in different timings, thereby outputting two types of parallel data. Based on the input data, a timing detector 130 detects a timing which corresponds to boundaries between bits of a data portion before biphase encoding. Based on the detection result of the timing detector, a selector 140 selects either one of the two types of parallel data output from the S/P converter 120.
    Type: Grant
    Filed: February 4, 2004
    Date of Patent: January 4, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takahisa Sakai, Yuji Mizuguchi, Toshitomo Umei, Noboru Katta
  • Publication number: 20040240567
    Abstract: A data reception method, an apparatus implementing such a method, and a data transmission system are disclosed, in which appropriate evaluation levels for signal levels are set during initialization of data communications using small circuitry. A comparator 574 compares a difference value dd against its corresponding model value. If the difference value dd is greater than the model value, the comparator 574 updates one of registers 576a to 576n which is currently selected, by adding a predetermined numeric value to the model value. If the difference value dd is smaller than the model value, the comparator 574 updates one of the registers 576a to 576n which is currently selected, by subtracting a predetermined numeric value from the model value. An evaluation level value arithmetic circuit 572 calculates evaluation levels R1 to R13 using model values set in the registers 576a to 576n, and stores the evaluation levels R1 to R13 respectively to registers 577a to 577m of an evaluation level storage section 573.
    Type: Application
    Filed: February 13, 2004
    Publication date: December 2, 2004
    Inventors: Takashi Akita, Noboru Katta, Takahisa Sakai, Yuji Mizuguchi, Hirotsugu Kawada, Toshitomo Umei
  • Publication number: 20040155720
    Abstract: A receiver includes a noise reduction circuit for eliminating noise from a differential signal transmitted through a differential transmission line and a data recovery circuit for recovering data from a differential signal outputted from the noise reduction circuit. The noise reduction circuit includes common-mode chokes for reflecting common-mode noise superimposed on an input differential signal and a common-mode noise reduction circuit for directing the common-mode noise reflected by the common-mode chokes to a low potential point of the common-mode noise reduction circuit.
    Type: Application
    Filed: August 22, 2003
    Publication date: August 12, 2004
    Inventors: Nobuhiko Yasui, Noboru Katta, Takahisa Sakai, Yuji Mizuguchi, Yutaka Takahira, Hirotsugu Kawada, Toshitomo Umei, Takashi Akita, Osamu Shibata
  • Publication number: 20040088436
    Abstract: It is an object to provide a ring-shaped network which can speedily perform initialization even when a plurality of data transmission apparatuses, each performing multi-valued transmission while assigning one or more bits of data as one data symbol to a signal level, are connected thereto, and a data transmission apparatus.
    Type: Application
    Filed: April 4, 2003
    Publication date: May 6, 2004
    Inventors: Noboru Katta, Yuji Mizuguchi, Takahisa Sakai, Hirotsugu Kawada, Toshihiko Kurosaki, Nobuhiko Yasui, Yutaka Takahira
  • Publication number: 20040042555
    Abstract: A digital data transmission apparatus includes a transmitting end (100) that includes: a binary/quadrary conversion unit (110) for converting a data stream; a coding unit (120) for mapping the converted data to be coded; a digital filter (130); a D/A conversion unit (140); a low-pass filter (150) for eliminating a high-band signal; a differential driver (160) for inputting an analog signal that has passed through the low-pass filter into a twisted pair cable (300), and a receiving end (200) that includes: a low-pass filter (210) for eliminating noises from both wires of the twisted pair cable; a receiver (220) for receiving the signals that have passed through the low-pass filter; an A/D conversion unit (230); a digital filter (240); an evaluation unit (250) for evaluating a signal level of a received signal; a decoding unit (260) for decoding the signal level into receipt data; and a synchronization unit (270) for generating a clock.
    Type: Application
    Filed: April 4, 2003
    Publication date: March 4, 2004
    Inventors: Hirotsugu Kawada, Yuji Mizuguchi, Takahisa Sakai, Noboru Katta, Toshihiko Kurosaki