Abstract: A demodulation device comprises at least a diversity combiner, an elimination parameter storage, an elimination parameter investigator, a noise eliminator, and a noise collection means. The elimination parameter storage stores elimination parameters used for eliminating a noise, as elimination parameters for each of antennas, the noise collection means receives a noise and outputs the received noise as a collected noise signal, and the diversity combiner outputs a combined signal along with combining parameters, each representing a parameter related to the combining for each of the antennas. The noise eliminator eliminates the noise by using the elimination parameters for all the antennas as well as the combining parameters for all the antennas.

Abstract: A demodulation device comprises at least a diversity combiner, an elimination parameter storage, an elimination parameter investigator, a noise eliminator, and a noise collection means. The elimination parameter storage stores elimination parameters used for eliminating a noise, as elimination parameters for each of antennas, the noise collection means receives a noise and outputs the received noise as a collected noise signal, and the diversity combiner outputs a combined signal along with combining parameters, each representing a parameter related to the combining for each of the antennas. The noise eliminator eliminates the noise by using the elimination parameters for all the antennas as well as the combining parameters for all the antennas.

Abstract: A digital signal receiving system is provided for establishing high-speed clock resynchronization even if abnormality such as a poor radio wave receiving condition takes place. The system is constructed such that recipient STC data and PCR data are acquired in response to detection of a variation in frequency of a clock signal, and these data are stored as variation information data. The receiver 10 sets the PCR data in the R_STC counter 142, and sends the variation information data to the host device 20. The host device 20, in turn, sets a computation result obtained based on host STC data and the variation information data in the H_STC counter 242.

Abstract: A digital signal receiving system is provided for establishing high-speed clock resynchronization even if abnormality such as a poor radio wave receiving condition takes place. The system is constructed such that recipient STC data and PCR data are acquired in response to detection of a variation in frequency of a clock signal, and these data are stored as variation information data. The receiver 10 sets the PCR data in the R_STC counter 142, and sends the variation information data to the host device 20. The host device 20, in turn, sets a computation result obtained based on host STC data and the variation information data in the H_STC counter 242.

Abstract: When controlling a window stack for managing a stack of windows in displaying a plurality of windows on a display unit (11) by a computer (7), each of the application programs (101, 102, and 103) assigns a window to a group, and the window management program (104) collectively arrange the window as a group so as to determine a stacking order of the window in the group. Thereby, a window display performed by an application displaying a window at the forefront is prevented from being improperly influenced by another application.