Abstract: A vacuum circuit breaker serving as a switch includes a pair of electrodes that serve as a stationary electrode and a movable electrode, a handler including a movable shaft and a housing that operate as a first mover in withdrawing the movable electrode from the stationary electrode and closing the movable electrode toward the stationary electrode, a movable shaft that is connected as a second mover to the movable electrode, a coil spring that is connected as an elastic between the first mover and the second mover to press the movable electrode against the stationary electrode, and a shock absorber that attenuates as an attenuator contraction of the elastic when the movable electrode is withdrawn from the stationary electrode.

Abstract: A clad material for a cooler is provided by executing production of a tensile strain of 3 to 10% or rolling at a finish rolling ratio of 10 to 25%, and optionally performing a heat treatment for 1 to 8 hours at a temperature within a range from 150 to 400° C., on a clad raw material having a three layer structure of a core material, a first brazing filler metal layer that covers one side (the surface on the side of a cooling water passage) of this core material, and a second brazing filler metal layer that covers the other side (the surface on the opposite side from the cooling water passage). Specific ranges are prescribed for certain properties before and after brazing.

Abstract: In this brazing method, which brazes an insulating substrate and a top plate that configure an HV inverter cooler, the insulating substrate is disposed on the top plate with a brazing material layer therebetween, and then, by means of laser irradiation, laser welding is performed at an arbitrary plurality of positions at the joining section between the top plate and the insulating substrate, thus provisionally affixing the insulating substrate to the top plate. Thereafter, by means of heating and melting the brazing material layer, the insulating substrate is brazed onto the top plate with the plurality of laser-welded positions as the brazing start points. After brazing, a power semiconductor is joined onto the insulating substrate corresponding to the center portion of the region surrounded by the plurality of brazing start points.

Abstract: A clad material for a cooler is provided by executing production of a tensile strain of 3 to 10% or rolling at a finish rolling ratio of 10 to 25%, and optionally performing a heat treatment for 1 to 8 hours at a temperature within a range from 150 to 400° C., on a clad raw material having a three layer structure of a core material, a first brazing filler metal layer that covers one side (the surface on the side of a cooling water passage) of this core material, and a second brazing filler metal layer that covers the other side (the surface on the opposite side from the cooling water passage). Specific ranges are prescribed for certain properties before and after brazing.

Abstract: A heat exchanger has a clad thin sheet material, a clad thick sheet material that is disposed so as to define a passage between the clad thick sheet material and the clad thin sheet material, and that has a sheet thickness greater than that of the clad thin sheet material, and an inner fin held between the clad materials. The clad thick sheet material and the clad thin sheet material have Zn-containing brazing filler metal layers on their passage sides, respectively, and the post-brazing surface Zn amounts are set so as to satisfy specific conditions. Further, certain conditions concerning the compositions of each of the layers that constitute the clad materials, and the inner fin are set.

Abstract: In this brazing method, which brazes an insulating substrate and a top plate that configure an HV inverter cooler, the insulating substrate is disposed on the top plate with a brazing material layer therebetween, and then, by means of laser irradiation, laser welding is performed at an arbitrary plurality of positions at the joining section between the top plate and the insulating substrate, thus provisionally affixing the insulating substrate to the top plate. Thereafter, by means of heating and melting the brazing material layer, the insulating substrate is brazed onto the top plate with the plurality of laser-welded positions as the brazing start points. After brazing, a power semiconductor is joined onto the insulating substrate corresponding to the center portion of the region surrounded by the plurality of brazing start points.

Abstract: In a heat exchanger, a liquid resin is applied to an outer surface of the heat exchanger, and then surplus liquid resin is removed from the outer surface. In removing the surplus liquid resin, before air having a first velocity is directed to the heat exchanger for blowing the surplus liquid resin off the heat exchanger, air having a second velocity lower than the first velocity is directed to the heat exchanger to remove the surplus liquid resin from the heat exchanger by moving the surplus liquid resin along the outer surface of the heat exchanger. The air at the second velocity is directed toward the heat exchanger by a second blower before the air at the first velocity is directed toward the heat exchanger by a first blower.

Abstract: In a method of manufacturing a heat exchanger, a liquid resin is applied to an outer surface of the heat exchanger, and then surplus liquid resin is removed from the outer surface. In removing the surplus liquid resin, before a first air having a first velocity is directed to the heat exchanger for blowing the surplus liquid resin off the heat exchanger, a second air having a second velocity lower than the first velocity is directed to the heat exchanger to remove the surplus liquid resin from the heat exchanger by moving the surplus liquid resin along the outer surface of the heat exchanger. The second air is directed toward the heat exchanger by a second blower before the first air is directed toward the heat exchanger by a first blower.

Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS•FETs.

Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS·FETs.

Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS·FETs.

Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer The well region is formed with the gate insulating films of MIS·FETs.

Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS.FETS.

Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS.FETs.

Abstract: Over the principal surface of a semiconductor substrate body containing an impurity of a predetermined conduction type, there is formed an epitaxial layer which contains an impurity of the same conduction type as that of the former impurity and the same concentration as the designed one of the former impurity. After this, there are formed a well region which has the same conduction type as that of said impurity and its impurity concentration gradually lowered depthwise of said epitaxial layer. The well region is formed with the gate insulating films of MIS.FETs.