Abstract: Automated centralized access to and management of content items stored on a plurality of content sources is provided. A content services module receives information regarding content sources which comprise third-party cloud storage servers and a user's personal computing devices in addition to receiving the user's access tokens for secured content sources. The content services modules act as a proxy for the user to the content sources and enables the user to execute various tasks across the content items stored in the various content sources via the interface.

Abstract: An optical fiber suited for dispersion compensation with simultaneous Raman amplification. The fiber has a central core and an index profile that defines successively concentric regions radially outward of the core. The core has a diameter of between 2 and 5 microns (&mgr;m) and a refractive index difference (&Dgr;n) with respect to the outer cladding of between 0.012 and 0.035. A trench region adjacent the core is between 2 and 6 &mgr;m wide and has a negative &Dgr;n of between −0.015 and −0.003. A ring region adjacent the trench region is between 1 and 5 &mgr;m wide and has a &Dgr;n of between 0.001 and 0.015, and an inner cladding surrounding the ring region has a width of between zero and 5 &mgr;m and a &Dgr;n of between −0.011 and 0.001. A dispersion slope compensating module (DSCM) including the fiber obtains a relatively high Raman gain with respect to conventional DSCMs that are pumped for Raman amplification.

Abstract: In order to move data blocks from a source memory unit (8, 9, 12) to a target memory unit (12, 8, 9) by means of a data path (5, 6, 7), wherein the blocks moved are not necessarily framed in the blocks of the source memory and the target memory, an electrical circuit makes it possible to perform a framing with a granularity equal to the width of the data path. To reduce latency, the framing is done by a shift register with a storage capacity reduced to that of a single block.

Abstract: In order to allow an external memory space to enter into the memory space of a microprocessor (43) comprising a cache memory (94), an integrated circuit (42) serves as an interface between the microprocessor (43) and a memory unit (8, 9, 12) constituting the external memory space. The integrated circuit (42) comprises a stack (91) sized for containing a data block from the memory unit (8, 9, 12) such that the block from the memory unit (8, 9, 12) is seen as one or more blocks in the cache memory (94), and a register (93) belonging to the memory space of the microprocessor (43) adapted to contain the coordinates for access to the memory unit (8, 9, 12).