Patents by Inventor Yukari Ishiguro

Yukari Ishiguro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Communication network system, and ID allocating method and ID setting method for communication network system
    Patent number: 7634547
    Abstract: When each slave ECU is powered on and activated while connected to a communication network through a harness, it reads out divided voltage potential applied by voltage dividing resistors in each ID determining signal line, and allows reception of a data packet transmitted from control ECU when a wait time corresponding to the divided voltage potential elapses. The control ECU successively transmits a data packet containing as a main body ID data to be allocated to each slave ECU, and each slave ECU sets ID data transmitted as its own ID.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: December 15, 2009
    Assignee: DENSO CORPORATION
    Inventors: Yukari Ishiguro, Hideaki Ishihara, Toshihiko Matsuoka
  • Microcomputer using a shared counter
    Patent number: 7149915
    Abstract: In a microcomputer, a watch-dog timer and a sleep control timer share a counter in their signal generating circuits. In a normal operation mode, an AND gate is in a signal passing state and a reset signal RST can be outputted. In a sleep mode, another AND gate is in a signal passing state and a wake-up signal WKUP can be outputted.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: December 12, 2006
    Assignee: Denso Corporation
    Inventors: Toshihiko Matsuoka, Yukari Ishiguro, Hideaki Ishihara
  • Communication network system, and ID allocating method and ID setting method for communication network system
    Publication number: 20050152388
    Abstract: When each slave ECU is powered on and activated while connected to a communication network through a harness, it reads out divided voltage potential applied by voltage dividing resistors in each ID determining signal line, and allows reception of a data packet transmitted from control ECU when a wait time corresponding to the divided voltage potential elapses. The control ECU successively transmits a data packet containing as a main body ID data to be allocated to each slave ECU, and each slave ECU sets ID data transmitted as its own ID.
    Type: Application
    Filed: December 7, 2004
    Publication date: July 14, 2005
    Inventors: Yukari Ishiguro, Hideaki Ishihara, Toshihiko Matsuoka
  • Microcomputer using a shared counter
    Publication number: 20040168098
    Abstract: In a microcomputer, a watch-dog timer and a sleep control timer share a counter in their signal generating circuits. In a normal operation mode, an AND gate is in a signal passing state and a reset signal RST can be outputted. In a sleep mode, another AND gate is in a signal passing state and a wake-up signal WKUP can be outputted.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 26, 2004
    Inventors: Toshihiko Matsuoka, Yukari Ishiguro, Hideaki Ishihara