Abstract: A CPU, when shifting to a sleep mode, discontinues the oscillating operations of an oscillation circuit and of a frequency multiplier circuit through a low power consumption control circuit. A flash power source circuit discontinues the oscillating operations of the circuits or interrupts or resumes the supply of an external power source in response to resumption of the halted operation. When the CPU is to be shifted to the sleep mode, the frequency multiplier circuit holds the set oscillation control conditions. When the oscillating operation is to be resumed, operates based on the oscillation control conditions that are held. When the sleep mode is reset, the CPU makes access to the mask ROM and immediately reads out a control program that is to be executed right after the wakeup.

Abstract: In an EEPROM of a microcomputer, data is stored for determining a communication rate CMR for fixing the data transmission time of one frame managed by a communication circuit on the basis of an oscillation output characteristic of a CR oscillating circuit that varies in accordance with temperature. CPU reads out data stored in EEPROM in accordance with the temperature detected by a temperature detecting circuit, and sets the determined communication CMR into the communication circuit.

Abstract: In an EEPROM of a microcomputer, data is stored for determining a communication rate CMR for fixing the data transmission time of one frame managed by a communication circuit on the basis of an oscillation output characteristic of a CR oscillating circuit that varies in accordance with temperature. CPU reads out data stored in EEPROM in accordance with the temperature detected by a temperature detecting circuit, and sets the determined communication CMR into the communication circuit.

Abstract: A CPU, when shifting to a sleep mode, discontinues the oscillating operations of an oscillation circuit and of a frequency multiplier circuit through a low power consumption control circuit. A flash power source circuit discontinues the oscillating operations of the circuits or interrupts or resumes the supply of an external power source in response to resumption of the halted operation. When the CPU is to be shifted to the sleep mode, the frequency multiplier circuit holds the set oscillation control conditions. When the oscillating operation is to be resumed, operates based on the oscillation control conditions that are held. When the sleep mode is reset, the CPU makes access to the mask ROM and immediately reads out a control program that is to be executed right after the wakeup.