Patents by Inventor Yuki KARAMOTO

Yuki KARAMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096965
    Abstract: Provided is a semiconductor device comprising a gate trench portion and a first trench portion adjacent to the gate trench portion, the semiconductor device comprising: a drift region of a first conductivity type; a base region of a second conductivity type; an emitter region of the first conductivity type that is provided above the base region and has a higher doping concentration than that of the drift region; and a contact region of the second conductivity type that is provided above the base region and has a higher doping concentration than that of the base region. In a mesa portion between the gate trench portion and the first trench portion, the contact region may have a first contact portion and a second contact portion that are provided to extend from the first trench portion to below a lower end of the emitter region.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 21, 2024
    Inventors: Kaname MITSUZUKA, Yuki KARAMOTO
  • Publication number: 20240055483
    Abstract: Provided is a semiconductor device including a buffer region of a first conductivity type, which is provided between a lower surface of a semiconductor substrate and a drift region, has three or more doping concentration peaks in a depth direction of the semiconductor substrate, and has a higher concentration than the drift region, in which the three or more doping concentration peaks include a deepest peak farthest from the lower surface of the semiconductor substrate and a second peak second closest to the lower surface of the semiconductor substrate, and a peak width of the second peak is 2 times or more of a peak width of the deepest peak in the depth direction.
    Type: Application
    Filed: July 21, 2023
    Publication date: February 15, 2024
    Inventors: Yuki KARAMOTO, Kaname MITSUZUKA
  • Publication number: 20230299145
    Abstract: Provided is a semiconductor device including: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; and a buffer region provided between the drift region and the lower surface and having a higher doping concentration than the drift region. The buffer region has M doping concentration peaks provided at different positions in a depth direction of the semiconductor substrate, and a charge carrier coefficient ? represented by Expression (1) is 2000 or more and 50000 or less in at least one integer i (i is an integer of 1 or more and M?1 or less).
    Type: Application
    Filed: February 22, 2023
    Publication date: September 21, 2023
    Inventors: Yuki KARAMOTO, Kaname MITSUZUKA
  • Publication number: 20230261096
    Abstract: Provided is a semiconductor device including a semiconductor substrate. The semiconductor substrate has: an active portion; and a plurality of gate trench portions provided in the active portion on an upper surface of the semiconductor substrate and extending along an extending direction. The semiconductor device further includes: a gate runner provided between the active portion and an end side of the semiconductor substrate; and a plurality of gate polysilicon disposed apart from each other along the end side and respectively connecting the plurality of gate trench portions to the gate runner.
    Type: Application
    Filed: April 21, 2023
    Publication date: August 17, 2023
    Inventors: Yuki KARAMOTO, Kaname MITSUZUKA, Yoshihiro IKURA
  • Publication number: 20220352316
    Abstract: Provided is a semiconductor device including a drift region, a base region, two trench portions and a mesa portion, wherein at least one of the two trench portions is a gate trench portion, the mesa portion includes: a first conductivity type emitter region provided to be exposed on an upper surface of the mesa portion; a second conductivity type contact region provided to be exposed on the upper surface of the mesa portion alternately with the emitter region in an extending direction; and a second conductivity type connecting region with a higher doping concentration than the base region, wherein the connecting region is provided to overlap with the emitter region in a top view, is arranged apart from the gate trench portion, is arranged below the upper surface of the mesa portion, and connects two of the contact regions sandwiching the emitter region in the extending direction.
    Type: Application
    Filed: July 15, 2022
    Publication date: November 3, 2022
    Inventor: Yuki KARAMOTO
  • Publication number: 20220328669
    Abstract: Provided is a semiconductor device including a gate trench portion and a dummy trench portion adjacent to the gate trench portion. The semiconductor device may include: a drift region of a first conductivity type, provided in a semiconductor substrate; a base region of a second conductivity type, provided above the drift region; an emitter region of the first conductivity type, with a doping concentration higher than the drift region, provided above the base region; and a contact region of the second conductivity type, with a doping concentration higher than the base region, provided above the base region. The contact region may be provided below the lower end on the dummy trench portion side of the emitter region in the mesa portion between the gate trench portion and the dummy trench portion.
    Type: Application
    Filed: June 23, 2022
    Publication date: October 13, 2022
    Inventors: Kaname MITSUZUKA, Yuki KARAMOTO