Abstract: An information processing device presents first information indicating that voice input for the voice operation is possible and second information representing a domain of utterance in which voice operation is possible in response to an occurrence of a predetermined state transition, and performs voice recognition for voice input by a user.

Abstract: An image forming apparatus includes, an image forming portion configured to form a toner image on a sheet using printing toner and apply powder adhesive on the sheet, a fixing portion configured to heat the toner image formed on the sheet and the powder adhesive applied on the sheet by the image forming portion and fix the toner image and the powder adhesive to the sheet, and a bonding portion configured to bond the sheet with the powder adhesive by reheating the sheet having been heated by the fixing portion. The bonding portion is arranged above the image forming portion.

Abstract: The present technology relates to an information processing device and an information processing method that enable output of information using a more optimal output modal. Provided is an information processing device including a processing unit configured to perform processes of: acquiring apparatus information regarding an output modal for each electronic apparatus; selecting an electronic apparatus having an output modal that outputs information from among a plurality of electronic apparatuses on the basis of the acquired apparatus information; and outputting the information from an output modal of the selected electronic apparatus. The present technology can be applied to, for example, electronic apparatuses such as information apparatuses, video apparatuses, audio apparatuses, or household electrical appliances.

Abstract: A cluster system has nodes connected by a first network, including a master node, a first node performing an IO request with respect to a first volume of a storage device capable of including a plurality of volumes through a second network, and a second node taking over processing of the first node at the time of a failure of the first node. When a failure of the first network occurs in the first node, the master node transmits a connection release instruction through the second network. When the connection release instruction is received, the storage device releases the connection between the first node and the first volume, and updates connection state management information for managing such a connection state. The first node acquires the connection state to be managed through the second network, and executes post-processing relevant to the first volume that is associated with the connection release instruction.

Abstract: A cluster system has nodes connected by a first network, including a master node, a first node performing an IO request with respect to a first volume of a storage device capable of including a plurality of volumes through a second network, and a second node taking over processing of the first node at the time of a failure of the first node. When a failure of the first network occurs in the first node, the master node transmits a connection release instruction through the second network. When the connection release instruction is received, the storage device releases the connection between the first node and the first volume, and updates connection state management information for managing such a connection state. The first node acquires the connection state to be managed through the second network, and executes post-processing relevant to the first volume that is associated with the connection release instruction.

Abstract: A gearbox includes: the first helical gear; the second helical gear to engage with the first helical gear; a casing including a first member disposed in proximity to the first helical gear and a second member disposed in proximity to the second helical gear; a screw for fastening the first member with the second member, and disposed closer to the first helical gear than an engagement position between the first helical gear and the second helical gear and penetrating at least the second member; and a clip disposed closer to the second helical gear than the engagement position, and formed of a closed curve in such a manner that the first member end and the second member end are enclosed therein.

Abstract: Provided is a storage system and a data management method of a storage system enabling system-wide data deduplication. The storage system has a plurality of storage apparatuses in which one or a plurality of logical volumes are provided. Based on data information of data obtained through the generation of a request to write to a logical volume in the storage system, one storage apparatus among the plurality of storage apparatuses calculates, for a plurality of combinations of storage apparatus and logical volume in the storage system, a data capacity when duplicate data is removed for each of the storage apparatuses, calculates the total of the calculated data capacities as the total capacity of the whole storage system, and performs optimal arrangement arithmetic processing to output information indicating a combination with the smallest total capacity among the plurality of combinations.

Abstract: Disclosed is a gearbox enabling to inhibit defective engagement between a first helical gear and a second helical gear even when a restraint torque is applied. The gearbox includes: the first helical gear; the second helical gear to engage with the first helical gear; a casing including a first member disposed in proximity to the first helical gear and a second member disposed in proximity to the second helical gear; a screw for fastening the first member with the second member, and disposed closer to the first helical gear than an engagement position between the first helical gear and the second helical gear and penetrating at least the second member; and a clip disposed closer to the second helical gear than the engagement position, and formed of a closed curve in such a manner that the first member end and the second member end are enclosed therein.

Abstract: Provided is a storage system and a data management method of a storage system enabling system-wide data deduplication. The storage system has a plurality of storage apparatuses in which one or a plurality of logical volumes are provided. Based on data information of data obtained through the generation of a request to write to a logical volume in the storage system, one storage apparatus among the plurality of storage apparatuses calculates, for a plurality of combinations of storage apparatus and logical volume in the storage system, a data capacity when duplicate data is removed for each of the storage apparatuses, calculates the total of the calculated data capacities as the total capacity of the whole storage system, and performs optimal arrangement arithmetic processing to output information indicating a combination with the smallest total capacity among the plurality of combinations.

Abstract: A vehicular seat slide device, includes: a first rail fixed to one of a vehicular floor and a seat; a second rail fixed to the other one of the floor and the seat, and linked to be movable relative to the first rail; a screw rod supported by the second rail to be rotatable around an axial line which extends in a moving direction; a metal case fixed to the first rail, and through which the screw rod is inserted; a resin nut housed in the metal case in a state of being unmovable in the moving direction with respect to the metal case, and screwed to the screw rod; and a metal nut housed in the metal case in a state of not being in contact with the resin nut in the moving direction, and screwed to the screw rod.

Abstract: Pieces of working information on workloads, positions of the workloads, pieces of environmental information on cooling facilities, and positions of the cooling facilities are stored as arrangement information. The pieces of working information on the workloads are estimated, and allocation of tentative workloads is deduced for fear the pieces of working information may exceed the performances of a group of information processing devices. Tentative power consumptions and arrangement information resulting from the allocation of the tentative workloads, and tentative power consumptions and arrangement information necessary for the allocation of the tentative workloads are calculated. Tentative cooling powers required to control the cooling facilities are calculated. Allocation of the tentative workloads minimizing the sum total of the tentative power consumptions of the information processing devices and the tentative cooling powers of the cooling facilities is searched.

Abstract: A vehicular seat slide device, includes: a first rail fixed to one of a vehicular floor and a seat; a second rail fixed to the other one of the floor and the seat, and linked to be movable relative to the first rail; a screw rod supported by the second rail to be rotatable around an axial line which extends in a moving direction; a metal case fixed to the first rail, and through which the screw rod is inserted; a resin nut housed in the metal case in a state of being unmovable in the moving direction with respect to the metal case, and screwed to the screw rod; and a metal nut housed in the metal case in a state of not being in contact with the resin nut in the moving direction, and screwed to the screw rod.

Abstract: It is provided a computer comprising a nonvolatile memory for storing data, a control processor for controlling the saving of data into the nonvolatile memory, and a battery for supplying power to the computer in case of a failure of an external power supply, wherein the control processor checks a charge amount stored in the battery, calculates an amount of data which can be saved in the nonvolatile memory by the battery in case of a failure of the external power supply based on the checked charge amount, and saves data excluding the amount of data that can be saved, out of data which should be saved into the nonvolatile memory, into the nonvolatile memory in advance.

Abstract: Pieces of working information on workloads, positions of the workloads, pieces of environmental information on cooling facilities, and positions of the cooling facilities are stored as arrangement information. The pieces of working information on the workloads are estimated, and allocation of tentative workloads is deduced for fear the pieces of working information may exceed the performances of a group of information processing devices. Tentative power consumptions and arrangement information resulting from the allocation of the tentative workloads, and tentative power consumptions and arrangement information necessary for the allocation of the tentative workloads are calculated. Tentative cooling powers required to control the cooling facilities are calculated. Allocation of the tentative workloads minimizing the sum total of the tentative power consumptions of the information processing devices and the tentative cooling powers of the cooling facilities is searched.

Abstract: In a semiconductor device in which a plurality of memory LSIs and a plurality of processor LSIs are stacked, as the number of stacked layers increase, the communication distance of data between a memory LSI and a processor LSI will increase. Therefore, the parasitic capacitance and parasitic resistance of the wiring used for the communication increase and, as a result of which, the power and speed performance of the entire system will be degraded. At least two or more of the combinations of a processor LSI 100 and a memory LSI 200 are stacked and the processor LSI 100 and the memory LSI 200 in the same combination are stacked adjacent to each other in the vertical direction.

Abstract: In a semiconductor device in which a plurality of memory LSIs and a plurality of processor LSIs are stacked, as the number of stacked layers increase, the communication distance of data between a memory LSI and a processor LSI will increase. Therefore, the parasitic capacitance and parasitic resistance of the wiring used for the communication increase and, as a result of which, the power and speed performance of the entire system will be degraded. At least two or more of the combinations of a processor LSI 100 and a memory LSI 200 are stacked and the processor LSI 100 and the memory LSI 200 in the same combination are stacked adjacent to each other in the vertical direction.

Abstract: In a semiconductor device in which a plurality of memory LSIs and a plurality of processor LSIs are stacked, as the number of stacked layers increase, the communication distance of data between a memory LSI and a processor LSI will increase. Therefore, the parasitic capacitance and parasitic resistance of the wiring used for the communication increase and, as a result of which, the power and speed performance of the entire system will be degraded. At least two or more of the combinations of a processor LSI 100 and a memory LSI 200 are stacked and the processor LSI 100 and the memory LSI 200 in the same combination are stacked adjacent to each other in the vertical direction.

Abstract: As the transfer between a processor LSI and a memory has been increasing year by year, there is a demand for increasing the traffic amount and reducing the power required for communication. With this being the condition, a method of stacking LSIs thereby reducing the communication distance is being contemplated. However, the inventors have found that the reduction of cost in the stacking process and the increase in the degree of freedom of selecting the memory LSI to be stacked are required for a simple stacking of processor LSIs and memory LSIs as so far practiced. An external communication LSI including a circuit for performing the communication with the outside of the stacked LSI at a high rate of more than 1 GHz; a processor LSI including a general purpose CPU etc.; and a memory LSI including a DRAM etc. are stacked in this order and those LSIs are connected with one another with a through silicon via to enable a high speed and high volume communication at a shortest path.

Abstract: In a semiconductor device in which a plurality of memory LSIs and a plurality of processor LSIs are stacked, as the number of stacked layers increase, the communication distance of data between a memory LSI and a processor LSI will increase. Therefore, the parasitic capacitance and parasitic resistance of the wiring used for the communication increase and, as a result of which, the power and speed performance of the entire system will be degraded. At least two or more of the combinations of a processor LSI 100 and a memory LSI 200 are stacked and the processor LSI 100 and the memory LSI 200 in the same combination are stacked adjacent to each other in the vertical direction.

Abstract: A semiconductor integrated circuit with processors incorporated therein, which makes it possible to achieve a good balance between realizing low-power consumption control, and securing a processing performance that the practicability of real time processing is required. The semiconductor integrated circuit with processors incorporated therein is provided with a management unit, combining first control for changing a value of the voltage and a frequency of the clock signal based on control information contained in the program, and second control for changing the voltage value and clock signal frequency according to a progress status of a process by the processor, thereby to accelerate progress of the process by the processor. In a period during which the frequency and voltage of each processor are raised, the power consumption is increased, however it becomes possible to achieve high-speed processing.