Patents by Inventor Yuki Matsuo

Yuki Matsuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11919158
    Abstract: A joint unit that is reduced in size including a plurality of angle detection mechanisms. A joint unit including an input-side support member for a rotationally driven input shaft, a decelerator that decelerates the input shaft to provide a deceleration output shaft, an output rotating body coupled to the deceleration output shaft including a strain generating portion that generates strain due to rotation transmitted by the deceleration output shaft, and an associated rotating body that is coupled to a output-side portion of the strain generating portion of the output rotating body to rotate together with the output rotating body disposed in a space between the input-side support member and an input-side portion of the strain generating portion of the output rotating body.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: March 5, 2024
    Assignee: TOKYO ROBOTICS INC.
    Inventors: Yuki Matsuo, Yoshihiro Sakamoto
  • Patent number: 11443869
    Abstract: A wiring member includes a plurality of wire-like transmission members each including a transmission wire body and a coat covering the transmission wire body and a flattening member keeping the plurality of wire-like transmission members in a flat state. For example, the flattening member is considered to include a first flattening member which is a member formed separately from the plurality of wire-like transmission members.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: September 13, 2022
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuki Matsuo, Tetsuya Nishimura, Ryuta Takakura, Masaki Mizushita, Haruka Nakano, Yuya Fukami, Suguru Yasuda, Hitoshi Hasegawa, Kenta Arai, Housei Mizuno
  • Publication number: 20220229674
    Abstract: An information processing apparatus includes: a processor configured to: perform control that displays a virtual screen superimposed on a real space to a user; and when attaching a device to be added to an electronic substrate, display a guidance for attaching the device to the electronic substrate as the virtual screen, with respect to the electronic substrate and the device in the real space.
    Type: Application
    Filed: July 7, 2021
    Publication date: July 21, 2022
    Applicant: FUJIFILM BUSINESS INNOVATION CORP.
    Inventor: Yuki MATSUO
  • Patent number: 11183317
    Abstract: A stacked wiring member includes a plurality of stacked flat wiring members. Each of the plurality of flat wiring members includes a plurality of wire-like transmission members and a base member keeping the plurality of wire-like transmission members in a parallel state in at least a part of the plurality of wire-like transmission members in an extension direction thereof. Wire-like transmission members having different thicknesses in the plurality of wire-like transmission members are disposed to be located together in a stacked direction of the plurality of flat wiring members.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: November 23, 2021
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Daisuke Ebata, Yuya Fukami, Hitoshi Hasegawa, Suguru Yasuda, Ryuta Takakura, Yuki Matsuo, Tetsuya Nishimura, Haruka Nakano, Masaki Mizushita, Kenta Arai, Motohiro Yokoi, Kenta Ito, Shigeki Ikeda, Housei Mizuno
  • Publication number: 20210268644
    Abstract: A robot arm and the like are provided which can be appropriately driven even by using a DC power supply having a lower output voltage than a general commercial power supply. The robot arm is provided with a housing and includes: an AC motor having a predetermined drive voltage; and a board having a drive circuit mounted thereon, the drive circuit driving the AC motor by converting a DC voltage into an AC voltage, the DC voltage being output from a power supply providing a predetermined DC voltage output. The board is arranged in surface contact with a predetermined surface of the housing.
    Type: Application
    Filed: June 4, 2019
    Publication date: September 2, 2021
    Applicant: Tokyo Robotics Inc.
    Inventors: Takamitsu TAKAGI, Yuki MATSUO, Yoshihiro SAKAMOTO
  • Publication number: 20210210249
    Abstract: A wiring member includes a plurality of wire-like transmission members each including a transmission wire body and a coat covering the transmission wire body and a flattening member keeping the plurality of wire-like transmission members in a flat state. For example, the flattening member is considered to include a first flattening member which is a member formed separately from the plurality of wire-like transmission members.
    Type: Application
    Filed: February 25, 2019
    Publication date: July 8, 2021
    Applicants: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yuki MATSUO, Tetsuya NISHIMURA, Ryuta TAKAKURA, Masaki MIZUSHITA, Haruka NAKANO, Yuya FUKAMI, Suguru YASUDA, Hitoshi HASEGAWA, Kenta ARAI, Housei MIZUNO
  • Publication number: 20210193349
    Abstract: A stacked wiring member includes a plurality of stacked flat wiring members. Each of the plurality of flat wiring members includes a plurality of wire-like transmission members and a base member keeping the plurality of wire-like transmission members in a parallel state in at least a part of the plurality of wire-like transmission members in an extension direction thereof. Wire-like transmission members having different thicknesses in the plurality of wire-like transmission members are disposed to be located together in a stacked direction of the plurality of flat wiring members.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 24, 2021
    Applicants: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Daisuke EBATA, Yuya FUKAMI, Hitoshi HASEGAWA, Suguru YASUDA, Ryuta TAKAKURA, Yuki MATSUO, Tetsuya NISHIMURA, Haruka NAKANO, Masaki MIZUSHITA, Kenta ARAI, Motohiro YOKOI, Kenta ITO, Shigeki IKEDA, Housei MIZUNO
  • Publication number: 20210053235
    Abstract: The invention relates to a joint unit that is reduced in size while being provided with a plurality of angle detection mechanisms. The joint unit includes an input-side support member that supports a rotationally driven input shaft, a decelerator that decelerates the input shaft to provide a deceleration output shaft, an output rotating body that is coupled to the deceleration output shaft, and includes a strain generating portion that generates strain due to rotation transmitted by the deceleration output shaft, and an associated rotating body that is coupled to a output-side portion of the strain generating portion of the output rotating body to rotate together with the output rotating body, and is disposed in a space between the input-side support member and an input-side portion of the strain generating portion of the output rotating body.
    Type: Application
    Filed: March 28, 2019
    Publication date: February 25, 2021
    Applicant: TOKYO ROBOTICS INC.
    Inventors: Yuki MATSUO, Yoshihiro SAKAMOTO
  • Patent number: 10581748
    Abstract: An information processing apparatus including a communication interface to communicate with another information processing apparatus, and a processor that executes a process including issuing, by a first thread, a reception request of data from the another information processing apparatus to the communication interface, determining, by using the first thread, whether a completion notification is stored in a queue that stores data transmitted from the other information processing apparatus, causing the first thread to transit to a suspended state when the completion notification is not stored, executing a processing by using a second thread included in the plurality of threads when the first thread is in the suspended state, determining whether the completion notification is stored in the queue after the processing, and transferring the received data to the first thread and causing the first thread to return from the suspended state, upon a storing of the completion notification.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: March 3, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Yuki Matsuo, Munenori Maeda, Kohta Nakashima
  • Patent number: 10318362
    Abstract: An information processing apparatus including a memory that stores correspondence information, the correspondence information indicating a correspondence between a plurality of first identifiers and a plurality of combinations of one of a plurality of first threads and one of a plurality of second threads, respectively, and a processor coupled to the memory and the processor configured to execute a process including storing, into a queue, a completion notification corresponding to received data upon a reception of the received data, the received data including a second identifier indicating a combination of transmission source thread among the plurality of second threads and a destination thread among the plurality of first threads, retrieving the completion notification stored in the queue, specifying a third thread among the plurality of first threads based on the second identifier included in the received data and the correspondence information, and transmitting the received data to the third thread.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: June 11, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yuki Matsuo, Munenori Maeda, Kohta Nakashima
  • Publication number: 20180307548
    Abstract: An information processing apparatus including a memory that stores correspondence information, the correspondence information indicating a correspondence between a plurality of first identifiers and a plurality of combinations of one of a plurality of first threads and one of a plurality of second threads, respectively, and a processor coupled to the memory and the processor configured to execute a process including storing, into a queue, a completion notification corresponding to received data upon a reception of the received data, the received data including a second identifier indicating a combination of transmission source thread among the plurality of second threads and a destination thread among the plurality of first threads, retrieving the completion notification stored in the queue, specifying a third thread among the plurality of first threads based on the second identifier included in the received data and the correspondence information, and transmitting the received data to the third thread.
    Type: Application
    Filed: April 16, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yuki Matsuo, Munenori Maeda, Kohta Nakashima
  • Publication number: 20180309687
    Abstract: An information processing apparatus including a communication interface to communicate with another information processing apparatus, and a processor that executes a process including issuing, by a first thread, a reception request of data from the another information processing apparatus to the communication interface, determining, by using the first thread, whether a completion notification is stored in a queue that stores data transmitted from the other information processing apparatus, causing the first thread to transit to a suspended state when the completion notification is not stored, executing a processing by using a second thread included in the plurality of threads when the first thread is in the suspended state, determining whether the completion notification is stored in the queue after the processing, and transferring the received data to the first thread and causing the first thread to return from the suspended state, upon a storing of the completion notification.
    Type: Application
    Filed: April 17, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yuki MATSUO, Munenori MAEDA, Kohta Nakashima
  • Patent number: 9852082
    Abstract: A processor generates stream information indicating a stream of access on the basis of the positional relationship on a storage device among a plurality of accessed first data blocks. The processor associates sequence information representing the positional relationship on the storage device with a plurality of second data blocks prefetched in a memory on the basis of the stream information. When a certain second data block is accessed, the processor searches for another second data block that is determined to be earlier in the order of access made by the stream than the certain second data block, on the basis of the sequence information. The processor removes the found second data block from the memory.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: December 26, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Yuki Matsuo
  • Publication number: 20170185520
    Abstract: An information processing apparatus includes a plurality of memory blocks, each of the plurality of memory blocks managed with either a first list or a second list, respectively; and a controller configured to refer a first memory block managed with a first list, maintain management of the first memory block with the first list if data of the first memory block is data that has been prefetched, and change an list with which the first memory block is managed from the first list to a second list if the data of the first memory block is data that has not been prefetched.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 29, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Yuki MATSUO
  • Publication number: 20170103023
    Abstract: A processor generates stream information indicating a stream of access on the basis of the positional relationship on a storage device among a plurality of accessed first data blocks. The processor associates sequence information representing the positional relationship on the storage device with a plurality of second data blocks prefetched in a memory on the basis of the stream information. When a certain second data block is accessed, the processor searches for another second data block that is determined to be earlier in the order of access made by the stream than the certain second data block, on the basis of the sequence information. The processor removes the found second data block from the memory.
    Type: Application
    Filed: September 12, 2016
    Publication date: April 13, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Yuki MATSUO
  • Publication number: 20170103024
    Abstract: A processor generates stream information indicating a stream of access events, based on a positional relationship between a plurality of first data blocks that are accessed in a storage device. The processor monitors access to a plurality of second data blocks that are prefetched based on the stream information, and determines whether the stream is ended based on elapsed time from last access to any of the plurality of second data blocks. The processor removes at least one of the plurality of second data blocks from the memory when the stream is determined to be ended.
    Type: Application
    Filed: September 13, 2016
    Publication date: April 13, 2017
    Inventor: Yuki MATSUO
  • Publication number: 20160253518
    Abstract: An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to generate divided check data by dividing check data into first division units corresponding to a type of the check data, compare the divided check data with divided confidential data obtained by dividing confidential data into second division units corresponding to a type of the confidential data, and determine whether the check data includes the confidential data based on a result of the comparison.
    Type: Application
    Filed: February 10, 2016
    Publication date: September 1, 2016
    Applicant: FUJITSU LIMITED
    Inventor: Yuki MATSUO
  • Publication number: 20120300440
    Abstract: A battery pack (40) includes battery modules, a flat battery box (20), and a solar panel (10). The modules are arranged in parallel to each other. Each module includes cylindrical rechargeable battery cells (41) that are arranged side by side in the longitudinal direction of the cells. One of the cells is serially connected to another one of the cells arranged adjacent to this one of the cells in the longitudinal direction. The box (20) accommodates the battery pack (40). The panel (10) includes solar cells (41) capable of generating power for charging the pack (40). The box (20) is arranged on the back surface of the panel (10). The panel (10) and the pack (40) are arranged substantially in parallel to each other so that the distances between the parts of panel (10) and the pack (40) are substantially fixed. The modules are held in a non-horizontal orientation.
    Type: Application
    Filed: January 26, 2011
    Publication date: November 29, 2012
    Inventors: Ichiro Miyamae, Yuji Uehara, Katsuhiko Kawabata, Yuki Matsuo