Patents by Inventor Yuki Matsuya

Yuki Matsuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9496814
    Abstract: When a motor drive control device is integrated in a semiconductor integrated circuit having a small chip area, calibration for improving the accuracy of detection of a counter electromotive voltage, which is for detecting the speed of a motor, is enabled. A first multiplier performs multiplication between a drive current detection signal and first gain information in a first register. A subtractor performs subtraction between a drive voltage command signal and a first multiplication result in the first multiplier. A second multiplier performs multiplication between a subtraction result in the subtractor and second gain information in a second register to generate counter electromotive voltage information as information on a second multiplication result. The drive voltage command signal in a control unit is set to a predetermined value to generate a condition which maintains the speed of the motor and a counter electromotive voltage at substantially zero.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: November 15, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Minoru Kurosawa, Yuki Matsuya
  • Publication number: 20150123576
    Abstract: When a motor drive control device is integrated in a semiconductor integrated circuit having a small chip area, calibration for improving the accuracy of detection of a counter electromotive voltage, which is for detecting the speed of a motor, is enabled. A first multiplier performs multiplication between a drive current detection signal and first gain information in a first register. A subtractor performs subtraction between a drive voltage command signal and a first multiplication result in the first multiplier. A second multiplier performs multiplication between a subtraction result in the subtractor and second gain information in a second register to generate counter electromotive voltage information as information on a second multiplication result. The drive voltage command signal in a control unit is set to a predetermined value to generate a condition which maintains the speed of the motor and a counter electromotive voltage at substantially zero.
    Type: Application
    Filed: January 15, 2015
    Publication date: May 7, 2015
    Inventors: Minoru KUROSAWA, Yuki MATSUYA
  • Patent number: 8963455
    Abstract: When a motor drive control device is integrated in a semiconductor integrated circuit having a small chip area, calibration for improving the accuracy of detection of a counter electromotive voltage, which is for detecting the speed of a motor, is enabled. A first multiplier performs multiplication between a drive current detection signal and first gain information in a first register. A subtractor performs subtraction between a drive voltage command signal and a first multiplication result in the first multiplier. A second multiplier performs multiplication between a subtraction result in the subtractor and second gain information in a second register to generate counter electromotive voltage information as information on a second multiplication result. The drive voltage command signal in a control unit is set to a predetermined value to generate a condition which maintains the speed of the motor and a counter electromotive voltage at substantially zero.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: February 24, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Minoru Kurosawa, Yuki Matsuya
  • Publication number: 20140021886
    Abstract: When a motor drive control device is integrated in a semiconductor integrated circuit having a small chip area, calibration for improving the accuracy of detection of a counter electromotive voltage, which is for detecting the speed of a motor, is enabled. A first multiplier performs multiplication between a drive current detection signal and first gain information in a first register. A subtractor performs subtraction between a drive voltage command signal and a first multiplication result in the first multiplier. A second multiplier performs multiplication between a subtraction result in the subtractor and second gain information in a second register to generate counter electromotive voltage information as information on a second multiplication result. The drive voltage command signal in a control unit is set to a predetermined value to generate a condition which maintains the speed of the motor and a counter electromotive voltage at substantially zero.
    Type: Application
    Filed: June 24, 2013
    Publication date: January 23, 2014
    Inventors: Minoru Kurosawa, Yuki Matsuya