Abstract: An analyzing apparatus (2000) acquires a target data set (10) and division number information (30). The target data set (10) is a set of target data (20) each indicating a pair of factor data (22) and result data (24). The division number information (30) indicates a division number being a number for dividing a numerical range of the factor data (22). The analyzing apparatus (2000) computes a plurality of boundary values for dividing the numerical range of the factor data (22) into a range of the division number. Further, the analyzing apparatus (2000) computes, for each boundary value, a test statistical quantity representing a difference relating to the result data (24) for two samples to be acquired by dividing the target data set (10) into two parts at the boundary value. Then, the analyzing apparatus (2000) generates test statistical quantity information (40) indicating a plurality of test statistical quantities computed for the each boundary value.

Abstract: A force sensor device 1, which is to be coupled to a first coupling counterpart 61 in a direction of a predetermined axis, includes: a sensor chip 110 that detects a moment around the predetermined axis; and a first coupling portion 40 including a first contact face 44, where the first contact face 44 is to face the first coupling counterpart 61 in the direction of the predetermined axis and is to contact the first coupling counterpart 61. An arithmetic average surface roughness Sa of the first contact face 44 is 3.0 or higher.

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24), and an auxiliary capacitor (25) of which one terminal is connected to a source node of the drive transistor (22); and a control unit (90) that provides a potential change to a source electrode of the drive transistor (22) by coupling through the auxiliary capacitor (25) to set an operation point of the drive transistor (22) as a cut-off region after the threshold value correction process.

Abstract: An electronic circuit that includes a plurality of first drivers coupled in parallel, the first drivers each including transistors coupled in series and transmitting data at a predetermined communication speed, and a second driver that includes transistors coupled in series and transmitting data at a communication speed lower than the communication speed of the first driver. The number of first drivers operating in parallel is sufficient for output impedance of the first drivers to meet a predetermined standard through application of an electrical potential to bodies of the transistors of the first drivers. The electrical potential causes an output level of the second driver to meet a predetermined standard.

Abstract: A display device includes a pixel array unit in which pixel circuits are disposed in a matrix form, the pixel circuits each including a light emission unit, a write transistor that writes a signal voltage of a video signal, a retention capacitor that retains the signal voltage written by the write transistor, and a drive transistor that drives the light emission unit on the basis of the signal voltage retained by the retention capacitor; and a common line that is wired along a pixel row, for each pixel row. The pixel circuit includes a switching transistor which selectively connects the common line and a source electrode of the drive transistor.

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24), and an auxiliary capacitor (25) of which one terminal is connected to a source node of the drive transistor (22); and a control unit (90) that provides a potential change to a source electrode of the drive transistor (22) by coupling through the auxiliary capacitor (25) to set an operation point of the drive transistor (22) as a cut-off region after the threshold value correction process.

Abstract: [Problem] Provided is an electronic circuit that is able to avoid the influence on the output level of the driver for low-speed communication due to a decrease in the voltage of the driver for high-speed communication in an interface for interconnection of devices in the electronic apparatus. [Solution] An electronic circuit includes a plurality of first drivers coupled in parallel, the first drivers each including transistors coupled in series and transmitting data at a predetermined communication speed; and a second driver including transistors coupled in series and transmitting data at a communication speed lower than the communication speed of the first driver. The number of first drivers operating in parallel is sufficient for output impedance of the first drivers to meet a predetermined standard through application of an electrical potential to bodies of the transistors of the first drivers. The electrical potential causes an output level of the second driver to meet a predetermined standard.

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24), and an auxiliary capacitor (25) of which one terminal is connected to a source node of the drive transistor (22); and a control unit (90) that provides a potential change to a source electrode of the drive transistor (22) by coupling through the auxiliary capacitor (25) to set an operation point of the drive transistor (22) as a cut-off region after the threshold value correction process.

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24), and an auxiliary capacitor (25) of which one terminal is connected to a source node of the drive transistor (22); and a control unit (90) that provides a potential change to a source electrode of the drive transistor (22) by coupling through the auxiliary capacitor (25) to set an operation point of the drive transistor (22) as a cut-off region after the threshold value correction process.

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24), and an auxiliary capacitor (25) of which one terminal is connected to a source node of the drive transistor (22); and a control unit (90) that provides a potential change to a source electrode of the drive transistor (22) by coupling through the auxiliary capacitor (25) to set an operation point of the drive transistor (22) as a cut-off region after the threshold value correction process.

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24), and an auxiliary capacitor (25) of which one terminal is connected to a source node of the drive transistor (22); and a control unit (90) that provides a potential change to a source electrode of the drive transistor (22) by coupling through the auxiliary capacitor (25) to set an operation point of the drive transistor (22) as a cut-off region after the threshold value correction process.

Abstract: Provided is a signal processing device including a signal synthesis unit that generates a first synthesis signal configured from an image signal to cause a first light emitting element used for displaying an image to emit light and a dummy pixel signal to cause a second light emitting element used for measuring brightness to emit light, a conversion unit that converts the generated first synthesis signal into a second synthesis signal to cause only the first light emitting element of the first light emitting element and the second light emitting element to emit light at identical brightness, regardless of a degradation degree of the first light emitting element, and a light emission control unit that causes the first light emitting element and the second light emitting element to emit light, on a basis of the second synthesis signal.

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits (20A) each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), and a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24); and a common line (35) that is wired along a pixel row, for each pixel row. The pixel circuit (20A) includes a switching transistor (26) which selectively connects the common line (35) and a source electrode of the drive transistor (22).

Abstract: A display device according to the present disclosure includes: a pixel array unit (30) in which pixel circuits (20A) are disposed in a matrix form, the pixel circuits each including a light emission unit (21), a write transistor (23) that writes a signal voltage (Vsig) of a video signal, a retention capacitor (24) that retains the signal voltage (Vsig) written by the write transistor (23), a drive transistor (22) that drives the light emission unit (21) on the basis of the signal voltage (Vsig) retained by the retention capacitor (24), and an auxiliary capacitor (25) of which one terminal is connected to a source node of the drive transistor (22); and a control unit (90) that provides a potential change to a source electrode of the drive transistor (22) by coupling through the auxiliary capacitor (25) to set an operation point of the drive transistor (22) as a cut-off region after the threshold value correction process.

Abstract: A color signal processing circuit of the present disclosure includes: a correction signal generation unit which generates, on the basis of a signal level of a color signal corresponding to one primary color among color signals corresponding to a plurality of primary colors being input, a correction signal for chromaticity of a color signal corresponding to another primary color as a difference value from a signal level of each color signal corresponding to predetermined chromaticity; and a correction unit which uses the correction signal generated by the correction signal generation unit to correct the color signal corresponding to the other primary color.

Abstract: A display apparatus includes: a display unit that includes a display area including display elements arranged in a two-dimensional matrix and is configured to display an image in the display area based on a video signal; and a correction signal generation unit configured to generate a correction signal that accelerates a change with time for a display element having a small change with time and performs a slowdown or a stop of the change with time for a display element having a large change with time, based on a value of the video signal and time-varying characteristics of a luminance of each display element. When the display apparatus is not used after a normal image is displayed based on the video signal, a corrected image based on the correction signal is displayed to equalize a degree of the change with time of each display element.

Abstract: Provided is a signal processing device including a signal synthesis unit that generates a first synthesis signal configured from an image signal to cause a first light emitting element used for displaying an image to emit light and a dummy pixel signal to cause a second light emitting element used for measuring brightness to emit light, a conversion unit that converts the generated first synthesis signal into a second synthesis signal to cause only the first light emitting element of the first light emitting element and the second light emitting element to emit light at identical brightness, regardless of a degradation degree of the first light emitting element, and a light emission control unit that causes the first light emitting element and the second light emitting element to emit light, on a basis of the second synthesis signal.

Abstract: A display unit with which diffraction reflection is able to be decreased is provided. The display unit includes a display section having an organic EL device and a pixel circuit for every pixel. The pixel circuit has a first transistor for writing a video signal and a second transistor for driving the organic EL device based on the video signal written by the first transistor. The second transistor has a gate, a source and a drain. The organic EL device has an anode, an organic layer, and a cathode. An upper face of the source or the drain is formed at least in a region opposed to the anode or the cathode.

Abstract: A display unit with which diffraction reflection is able to be decreased is provided. The display unit includes a display section having an organic EL device and a pixel circuit for every pixel. The pixel circuit has a first transistor for writing a video signal and a second transistor for driving the organic EL device based on the video signal written by the first transistor. The second transistor has a gate, a source and a drain. The organic EL device has an anode, an organic layer, and a cathode. An upper face of the source or the drain is formed at least in a region opposed to the anode or the cathode.

Abstract: A display unit with which diffraction reflection is able to be decreased is provided. The display unit includes a display section having an organic EL device and a pixel circuit for every pixel. The pixel circuit has a first transistor for writing a video signal and a second transistor for driving the organic EL device based on the video signal written by the first transistor. The second transistor has a gate, a source and a drain. The organic EL device has an anode, an organic layer, and a cathode. An upper face of the source or the drain is formed at least in a region opposed to the anode or the cathode.