Patents by Inventor Yuki Tsuruma
Yuki Tsuruma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220388908Abstract: A sintered oxide contains In element, Y element, and Ga element at respective atomic ratios as defined in formulae (1) to (3) below, 0.80?In/(In+Y+Ga)?0.96??(1), 0.02?Y/(In+Y+Ga)?0.10??(2), and 0.02?Ga/(In+Y+Ga)?0.10??(3), and Al element at an atomic ratio as defined in a formula (4) below, 0.005?Al/(In+Y+Ga+Al)?0.07??(4), where In, Y, Ga, and Al in the formulae represent the number of atoms of the In element, Y element, Ga element, and Al element in the sintered oxide, respectively.Type: ApplicationFiled: August 10, 2022Publication date: December 8, 2022Applicant: IDEMITSU KOSAN CO., LTD.Inventors: Kazuyoshi INOUE, Masatoshi SHIBATA, Emi KAWASHIMA, Yuki TSURUMA, Shigekazu TOMAI
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Patent number: 11447421Abstract: A sintered oxide contains In element, Y element, and Ga element at respective atomic ratios as defined in formulae (1) to (3) below, 0.80?In/(In+Y+Ga)?0.96??(1), 0.02?Y/(In+Y+Ga)?0.10??(2), and 0.02?Ga/(In+Y+Ga)?0.10??(3), and Al element at an atomic ratio as defined in a formula (4) below, 0.005?Al/(In+Y+Ga+Al)?0.07??(4), where In, Y, Ga, and Al in the formulae represent the number of atoms of the In element, Y element, Ga element, and Al element in the sintered oxide, respectively.Type: GrantFiled: March 29, 2018Date of Patent: September 20, 2022Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Kazuyoshi Inoue, Masatoshi Shibata, Emi Kawashima, Yuki Tsuruma, Shigekazu Tomai
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Patent number: 11189737Abstract: A laminated body comprising a substrate, one or more layers selected from a contact resistance reducing layer and a reduction suppressing layer, a Schottky electrode layer and a metal oxide semiconductor layer in this order.Type: GrantFiled: December 26, 2016Date of Patent: November 30, 2021Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Yoshihiro Ueoka, Takashi Sekiya, Shigekazu Tomai, Emi Kawashima, Yuki Tsuruma, Motohiro Takeshima
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Patent number: 11018238Abstract: A structure including a metal oxide semiconductor layer and a noble metal oxide layer, wherein the metal oxide semiconductor layer and the noble metal oxide layer are adjacent to each other, and a film thickness of the noble metal oxide layer is more than 10 nm.Type: GrantFiled: October 11, 2017Date of Patent: May 25, 2021Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Yuki Tsuruma, Emi Kawashima, Yoshikazu Nagasaki, Takashi Sekiya, Yoshihiro Ueoka
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Publication number: 20200266304Abstract: A laminated body comprising a substrate, one or more layers selected from a contact resistance reducing layer and a reduction suppressing layer, a Schottky electrode layer and a metal oxide semiconductor layer in this order.Type: ApplicationFiled: December 26, 2016Publication date: August 20, 2020Applicant: IDEMITSU KOSAN CO., LTD.Inventors: Yoshihiro UEOKA, Takashi SEKIYA, Shigekazu TOMAI, Emi KAWASHIMA, Yuki TSURUMA, Motohiro TAKESHIMA
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Publication number: 20200140337Abstract: A sintered oxide contains In element, Y element, and Ga element at respective atomic ratios as defined in formulae (1) to (3) below, 0.80?In/(In+Y+Ga)?0.96??(1), 0.02?Y/(In+Y+Ga)?0.10??(2), and 0.02?Ga/(In+Y+Ga)?0.10??(3), and Al element at an atomic ratio as defined in a formula (4) below, 0.005?Al/(In+Y+Ga+Al)?0.07??(4), where In, Y, Ga, and Al in the formulae represent the number of atoms of the In element, Y element, Ga element, and Al element in the sintered oxide, respectively.Type: ApplicationFiled: March 29, 2018Publication date: May 7, 2020Applicant: IDEMITSU KOSAN CO., LTD.Inventors: Kazuyoshi INOUE, Masatoshi SHIBATA, Emi KAWASHIMA, Yuki TSURUMA, Shigekazu TOMAI
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Patent number: 10636914Abstract: A crystalline oxide semiconductor thin film that is composed mainly of indium oxide and comprises surface crystal grains having a single crystal orientation.Type: GrantFiled: July 29, 2016Date of Patent: April 28, 2020Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Kazuyoshi Inoue, Futoshi Utsuno, Yuki Tsuruma, Shigekazu Tomai, Kazuaki Ebata
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Patent number: 10374045Abstract: A semiconductor device 1 which comprises a pair of an ohmic electrode 20 and a Schottky electrode 10 separated from each other, and a semiconductor layer 30 in contact with the ohmic electrode 20 and the Schottky electrode 10, and which satisfies the following formula (I): n < ? ? ? V e qL 2 ( I ) in which n is a carrier concentration (cm?3) of the semiconductor layer, ? is a dielectric constant (F/cm) of the semiconductor layer, Ve is a forward effective voltage (V) between the ohmic electrode and the Schottky electrode, q is an elementary charge (C), and L is a distance (cm) between the ohmic electrode and the Schottky electrode.Type: GrantFiled: December 21, 2016Date of Patent: August 6, 2019Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Yuki Tsuruma, Takashi Sekiya, Shigekazu Tomai, Emi Kawashima, Yoshihiro Ueoka
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Publication number: 20190237556Abstract: A structure including a metal oxide semiconductor layer and a noble metal oxide layer, wherein the metal oxide semiconductor layer and the noble metal oxide layer are adjacent to each other, and a film thickness of the noble metal oxide layer is more than 10 nm.Type: ApplicationFiled: October 11, 2017Publication date: August 1, 2019Applicant: Idemitsu Kosan Co., Ltd.Inventors: Yuki TSURUMA, Emi KAWASHIMA, Yoshikazu NAGASAKI, Takashi SEKIYA, Yoshihiro UEOKA
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Patent number: 10340356Abstract: A laminated body comprising a substrate, an ohmic electrode layer, a metal oxide semiconductor layer, a Schottky electrode layer and a buffer electrode layer in this order, wherein a reduction suppressing layer is provided between the Schottky electrode layer and the buffer electrode layer.Type: GrantFiled: December 26, 2016Date of Patent: July 2, 2019Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Emi Kawashima, Takashi Sekiya, Yuki Tsuruma, Yoshihiro Ueoka, Shigekazu Tomai, Motohiro Takeshima
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Publication number: 20190013389Abstract: A laminated body comprising a substrate, an ohmic electrode layer, a metal oxide semiconductor layer, a Schottky electrode layer and a buffer electrode layer in this order, wherein a reduction suppressing layer is provided between the Schottky electrode layer and the buffer electrode layer.Type: ApplicationFiled: December 26, 2016Publication date: January 10, 2019Applicant: IDEMITSU KOSAN CO., LTD.Inventors: Emi KAWASHIMA, Takashi SEKIYA, Yuki TSURUMA, Yoshihiro UEOKA, Shigekazu TOMAI, Motohiro TAKESHIMA
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Publication number: 20190006473Abstract: A semiconductor device 1 which comprises a pair of an ohmic electrode 20 and a Schottky electrode 10 separated from each other, and a semiconductor layer 30 in contact with the ohmic electrode 20 and the Schottky electrode 10, and which satisfies the following formula (I): n < ? ? ? V e qL 2 ( I ) in which n is a carrier concentration (cm?3) of the semiconductor layer, ? is a dielectric constant (F/cm) of the semiconductor layer, Ve is a forward effective voltage (V) between the ohmic electrode and the Schottky electrode, q is an elementary charge (C), and L is a distance (cm) between the ohmic electrode and the Schottky electrode.Type: ApplicationFiled: December 21, 2016Publication date: January 3, 2019Applicant: IDEMITSU KOSAN CO., LTD.Inventors: Yuki TSURUMA, Takashi SEKIYA, Shigekazu TOMAI, Emi KAWASHIMA, Yoshihiro UEOKA
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Publication number: 20180219098Abstract: A crystalline oxide semiconductor thin film that is composed mainly of indium oxide and comprises surface crystal grains having a single crystal orientation.Type: ApplicationFiled: July 29, 2016Publication date: August 2, 2018Applicant: IDEMITSU KOSAN CO., LTD.Inventors: Kazuyoshi INOUE, Futoshi UTSUNO, Yuki TSURUMA, Shigekazu TOMAI, Kazuaki EBATA
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Patent number: 9767998Abstract: A sputtering target including a sintered body: the sintered body including: indium oxide doped with Ga or indium oxide doped with Al, and a positive tetravalent metal in an amount of exceeding 100 at. ppm and 1100 at. ppm or less relative to the total of Ga and indium, or Al and indium, the crystal structure of the sintered body substantially including a bixbyite structure of indium oxide.Type: GrantFiled: September 6, 2012Date of Patent: September 19, 2017Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki, Yuki Tsuruma
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Publication number: 20160343554Abstract: An oxide sintered body comprising a bixbyite phase composed of In2O3 and an A3B5O12 phase (wherein A is one or more elements selected from the group consisting of Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, and B is one or more elements selected from the group consisting of Al and Ga).Type: ApplicationFiled: December 18, 2014Publication date: November 24, 2016Applicant: IDEMITSU KOSAN CO., LTD.Inventors: Shigekazu TOMAI, Kazuyoshi INOUE, Kazuaki EBATA, Masatoshi SHIBATA, Futoshi UTSUNO, Yuki TSURUMA, Yu ISHIHARA
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Patent number: 9178076Abstract: A thin film transistor (1) includes a source electrode (50), a drain electrode (60), a gate electrode (20), a gate insulating film (30), and a channel layer (40) that is formed of an oxide semiconductor, the channel layer (40) having an average carrier concentration of 1×1016/cm3 to 5×1019/cm3, and including a high carrier concentration region (42) that is situated on the side of the gate insulating film (30) and has a carrier concentration higher than the average carrier concentration, and the channel layer (40) having a substantially homogenous composition.Type: GrantFiled: August 8, 2012Date of Patent: November 3, 2015Assignee: IDEMITSU KOSAN CO., LTD.Inventors: Yuki Tsuruma, Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki
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Publication number: 20140252354Abstract: A sputtering target including a sintered body: the sintered body including: indium oxide doped with Ga or indium oxide doped with Al, and a positive tetravalent metal in an amount of exceeding 100 at. ppm and 1100 at. ppm or less relative to the total of Ga and indium, or Al and indium, the crystal structure of the sintered body substantially including a bixbyite structure of indium oxide.Type: ApplicationFiled: September 6, 2012Publication date: September 11, 2014Inventors: Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki, Yuki Tsuruma
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Patent number: 8785927Abstract: A stacked layer structure including an oxide layer and an insulating layer, the oxide layer having a carrier concentration of 1018/cm3 or less and an average crystal diameter of 1 ?m or more; and the crystals of the oxide layer being arranged in a columnar shape on the surface of the insulating layer.Type: GrantFiled: December 27, 2011Date of Patent: July 22, 2014Assignee: Idemitsu Kosan Co., Ltd.Inventors: Kazuaki Ebata, Shigekazu Tomai, Yuki Tsuruma, Shigeo Matsuzaki, Koki Yano
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Publication number: 20140197408Abstract: A thin film transistor (1) includes a source electrode (50), a drain electrode (60), a gate electrode (20), a gate insulating film (30), and a channel layer (40) that is formed of an oxide semiconductor, the channel layer (40) having an average carrier concentration of 1×1016/cm3 to 5×1019/cm3, and including a high carrier concentration region (42) that is situated on the side of the gate insulating film (30) and has a carrier concentration higher than the average carrier concentration, and the channel layer (40) having a substantially homogenous composition.Type: ApplicationFiled: August 8, 2012Publication date: July 17, 2014Inventors: Yuki Tsuruma, Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki
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Publication number: 20130221351Abstract: A stacked layer structure including an oxide layer and an insulating layer, the oxide layer having a carrier concentration of 1018/cm3 or less and an average crystal diameter of 1 ?m or more; and the crystals of the oxide layer being arranged in a columnar shape on the surface of the insulating layer.Type: ApplicationFiled: December 27, 2011Publication date: August 29, 2013Inventors: Kazuaki Ebata, Shigekazu Tomai, Yuki Tsuruma, Shigeo Matsuzaki, Koki Yano