Patents by Inventor Yuki Tsuruma

Yuki Tsuruma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200266304
    Abstract: A laminated body comprising a substrate, one or more layers selected from a contact resistance reducing layer and a reduction suppressing layer, a Schottky electrode layer and a metal oxide semiconductor layer in this order.
    Type: Application
    Filed: December 26, 2016
    Publication date: August 20, 2020
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Yoshihiro UEOKA, Takashi SEKIYA, Shigekazu TOMAI, Emi KAWASHIMA, Yuki TSURUMA, Motohiro TAKESHIMA
  • Publication number: 20200140337
    Abstract: A sintered oxide contains In element, Y element, and Ga element at respective atomic ratios as defined in formulae (1) to (3) below, 0.80?In/(In+Y+Ga)?0.96??(1), 0.02?Y/(In+Y+Ga)?0.10??(2), and 0.02?Ga/(In+Y+Ga)?0.10??(3), and Al element at an atomic ratio as defined in a formula (4) below, 0.005?Al/(In+Y+Ga+Al)?0.07??(4), where In, Y, Ga, and Al in the formulae represent the number of atoms of the In element, Y element, Ga element, and Al element in the sintered oxide, respectively.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 7, 2020
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Masatoshi SHIBATA, Emi KAWASHIMA, Yuki TSURUMA, Shigekazu TOMAI
  • Patent number: 10636914
    Abstract: A crystalline oxide semiconductor thin film that is composed mainly of indium oxide and comprises surface crystal grains having a single crystal orientation.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: April 28, 2020
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi Inoue, Futoshi Utsuno, Yuki Tsuruma, Shigekazu Tomai, Kazuaki Ebata
  • Patent number: 10374045
    Abstract: A semiconductor device 1 which comprises a pair of an ohmic electrode 20 and a Schottky electrode 10 separated from each other, and a semiconductor layer 30 in contact with the ohmic electrode 20 and the Schottky electrode 10, and which satisfies the following formula (I): n < ? ? ? V e qL 2 ( I ) in which n is a carrier concentration (cm?3) of the semiconductor layer, ? is a dielectric constant (F/cm) of the semiconductor layer, Ve is a forward effective voltage (V) between the ohmic electrode and the Schottky electrode, q is an elementary charge (C), and L is a distance (cm) between the ohmic electrode and the Schottky electrode.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: August 6, 2019
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Yuki Tsuruma, Takashi Sekiya, Shigekazu Tomai, Emi Kawashima, Yoshihiro Ueoka
  • Publication number: 20190237556
    Abstract: A structure including a metal oxide semiconductor layer and a noble metal oxide layer, wherein the metal oxide semiconductor layer and the noble metal oxide layer are adjacent to each other, and a film thickness of the noble metal oxide layer is more than 10 nm.
    Type: Application
    Filed: October 11, 2017
    Publication date: August 1, 2019
    Applicant: Idemitsu Kosan Co., Ltd.
    Inventors: Yuki TSURUMA, Emi KAWASHIMA, Yoshikazu NAGASAKI, Takashi SEKIYA, Yoshihiro UEOKA
  • Patent number: 10340356
    Abstract: A laminated body comprising a substrate, an ohmic electrode layer, a metal oxide semiconductor layer, a Schottky electrode layer and a buffer electrode layer in this order, wherein a reduction suppressing layer is provided between the Schottky electrode layer and the buffer electrode layer.
    Type: Grant
    Filed: December 26, 2016
    Date of Patent: July 2, 2019
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Emi Kawashima, Takashi Sekiya, Yuki Tsuruma, Yoshihiro Ueoka, Shigekazu Tomai, Motohiro Takeshima
  • Publication number: 20190013389
    Abstract: A laminated body comprising a substrate, an ohmic electrode layer, a metal oxide semiconductor layer, a Schottky electrode layer and a buffer electrode layer in this order, wherein a reduction suppressing layer is provided between the Schottky electrode layer and the buffer electrode layer.
    Type: Application
    Filed: December 26, 2016
    Publication date: January 10, 2019
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Emi KAWASHIMA, Takashi SEKIYA, Yuki TSURUMA, Yoshihiro UEOKA, Shigekazu TOMAI, Motohiro TAKESHIMA
  • Publication number: 20190006473
    Abstract: A semiconductor device 1 which comprises a pair of an ohmic electrode 20 and a Schottky electrode 10 separated from each other, and a semiconductor layer 30 in contact with the ohmic electrode 20 and the Schottky electrode 10, and which satisfies the following formula (I): n < ? ? ? V e qL 2 ( I ) in which n is a carrier concentration (cm?3) of the semiconductor layer, ? is a dielectric constant (F/cm) of the semiconductor layer, Ve is a forward effective voltage (V) between the ohmic electrode and the Schottky electrode, q is an elementary charge (C), and L is a distance (cm) between the ohmic electrode and the Schottky electrode.
    Type: Application
    Filed: December 21, 2016
    Publication date: January 3, 2019
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Yuki TSURUMA, Takashi SEKIYA, Shigekazu TOMAI, Emi KAWASHIMA, Yoshihiro UEOKA
  • Publication number: 20180219098
    Abstract: A crystalline oxide semiconductor thin film that is composed mainly of indium oxide and comprises surface crystal grains having a single crystal orientation.
    Type: Application
    Filed: July 29, 2016
    Publication date: August 2, 2018
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuyoshi INOUE, Futoshi UTSUNO, Yuki TSURUMA, Shigekazu TOMAI, Kazuaki EBATA
  • Patent number: 9767998
    Abstract: A sputtering target including a sintered body: the sintered body including: indium oxide doped with Ga or indium oxide doped with Al, and a positive tetravalent metal in an amount of exceeding 100 at. ppm and 1100 at. ppm or less relative to the total of Ga and indium, or Al and indium, the crystal structure of the sintered body substantially including a bixbyite structure of indium oxide.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: September 19, 2017
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki, Yuki Tsuruma
  • Publication number: 20160343554
    Abstract: An oxide sintered body comprising a bixbyite phase composed of In2O3 and an A3B5O12 phase (wherein A is one or more elements selected from the group consisting of Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, and B is one or more elements selected from the group consisting of Al and Ga).
    Type: Application
    Filed: December 18, 2014
    Publication date: November 24, 2016
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Shigekazu TOMAI, Kazuyoshi INOUE, Kazuaki EBATA, Masatoshi SHIBATA, Futoshi UTSUNO, Yuki TSURUMA, Yu ISHIHARA
  • Patent number: 9178076
    Abstract: A thin film transistor (1) includes a source electrode (50), a drain electrode (60), a gate electrode (20), a gate insulating film (30), and a channel layer (40) that is formed of an oxide semiconductor, the channel layer (40) having an average carrier concentration of 1×1016/cm3 to 5×1019/cm3, and including a high carrier concentration region (42) that is situated on the side of the gate insulating film (30) and has a carrier concentration higher than the average carrier concentration, and the channel layer (40) having a substantially homogenous composition.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: November 3, 2015
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Yuki Tsuruma, Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki
  • Publication number: 20140252354
    Abstract: A sputtering target including a sintered body: the sintered body including: indium oxide doped with Ga or indium oxide doped with Al, and a positive tetravalent metal in an amount of exceeding 100 at. ppm and 1100 at. ppm or less relative to the total of Ga and indium, or Al and indium, the crystal structure of the sintered body substantially including a bixbyite structure of indium oxide.
    Type: Application
    Filed: September 6, 2012
    Publication date: September 11, 2014
    Inventors: Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki, Yuki Tsuruma
  • Patent number: 8785927
    Abstract: A stacked layer structure including an oxide layer and an insulating layer, the oxide layer having a carrier concentration of 1018/cm3 or less and an average crystal diameter of 1 ?m or more; and the crystals of the oxide layer being arranged in a columnar shape on the surface of the insulating layer.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: July 22, 2014
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Kazuaki Ebata, Shigekazu Tomai, Yuki Tsuruma, Shigeo Matsuzaki, Koki Yano
  • Publication number: 20140197408
    Abstract: A thin film transistor (1) includes a source electrode (50), a drain electrode (60), a gate electrode (20), a gate insulating film (30), and a channel layer (40) that is formed of an oxide semiconductor, the channel layer (40) having an average carrier concentration of 1×1016/cm3 to 5×1019/cm3, and including a high carrier concentration region (42) that is situated on the side of the gate insulating film (30) and has a carrier concentration higher than the average carrier concentration, and the channel layer (40) having a substantially homogenous composition.
    Type: Application
    Filed: August 8, 2012
    Publication date: July 17, 2014
    Inventors: Yuki Tsuruma, Kazuaki Ebata, Shigekazu Tomai, Shigeo Matsuzaki
  • Publication number: 20130221351
    Abstract: A stacked layer structure including an oxide layer and an insulating layer, the oxide layer having a carrier concentration of 1018/cm3 or less and an average crystal diameter of 1 ?m or more; and the crystals of the oxide layer being arranged in a columnar shape on the surface of the insulating layer.
    Type: Application
    Filed: December 27, 2011
    Publication date: August 29, 2013
    Inventors: Kazuaki Ebata, Shigekazu Tomai, Yuki Tsuruma, Shigeo Matsuzaki, Koki Yano