Patents by Inventor Yukie Hiratsuka
Yukie Hiratsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240041382Abstract: An electronic device to acquire and analyze electroencephalogram data of the subject includes a cognitive function examination control section that presents examination data used for a cognitive function examination of the subject at the time of executing an operation having a different purpose from that of an electroencephalogram measurement, and a cognitive function analysis section that extracts an index of a cognitive function of the subject from electroencephalogram data of the subject measured when presenting examination data.Type: ApplicationFiled: October 17, 2023Publication date: February 8, 2024Inventors: Yukie HIRATSUKA, Chiyo OHNO
-
Patent number: 11850055Abstract: An electronic device to acquire and analyze electroencephalogram data of the subject includes a cognitive function examination control section that presents examination data used for a cognitive function examination of the subject at the time of executing an operation having a different purpose from that of an electroencephalogram measurement, and a cognitive function analysis section that extracts an index of a cognitive function of the subject from electroencephalogram data of the subject measured when presenting examination data.Type: GrantFiled: April 28, 2017Date of Patent: December 26, 2023Assignee: MAXELL, LTD.Inventors: Yukie Hiratsuka, Chiyo Ohno
-
Publication number: 20210113139Abstract: An electronic device to acquire and analyze electroencephalogram data of the subject includes a cognitive function examination control section that presents examination data used for a cognitive function examination of the subject at the time of executing an operation having a different purpose from that of an electroencephalogram measurement, and a cognitive function analysis section that extracts an index of a cognitive function of the subject from electroencephalogram data of the subject measured when presenting examination data.Type: ApplicationFiled: April 28, 2017Publication date: April 22, 2021Applicant: MAXELL, LTD.Inventors: Yukie HIRATSUKA, Chiyo OHNO
-
Publication number: 20150124077Abstract: A charged particle beam adjustment assistance device that can assist work to adjust a charged particle beam apparatus having a three-dimensional observing function and reduce human labor and man-hours required for adjustment value inputting is provided. An adjustment value acquiring unit generates optimal three-dimensional adjustment value information on the basis of two-dimensional adjustment value information and two/three-dimensional adjustment value correspondence information generated according to information inputted from a charged particle beam adjuster terminal, transmits the three-dimensional adjustment value information to the charged particle beam apparatus, and sets the three-dimensional adjustment value information therein. Therefore, the charged particle beam adjuster can reduce adjusting work required for three-dimensional observation and facilitate the work of observing three-dimensional images.Type: ApplicationFiled: April 4, 2013Publication date: May 7, 2015Applicant: Hitachi High-Technologies CorporationInventors: Naohiko Fukaya, Kenji Kitagawa, Masakazu Yagi, Yukie Hiratsuka, Wataru Kotake
-
Publication number: 20150113212Abstract: A read cache and a write cache are made up of two kinds of nonvolatile memories whose characteristics are different. For example, nonvolatile memory whose write endurance is high is assigned to the write cache, nonvolatile memory whose write endurance is low is assigned to the read cache, and the management tables of data in these caches are stored in the nonvolatile memory whose write endurance is high. Alternatively, nonvolatile memory that has a fast write speed but has a slow read speed is adopted for the write cache and nonvolatile memory that has a fast read speed but has a slow write speed is adopted for the read cache.Type: ApplicationFiled: December 31, 2014Publication date: April 23, 2015Inventors: Yukie HIRATSUKA, Seiji MIURA, Yukihide INAGAKI
-
Publication number: 20120054421Abstract: A read cache and a write cache are made up of two kinds of nonvolatile memories whose characteristics are different. For example, nonvolatile memory whose write endurance is high is assigned to the write cache, nonvolatile memory whose write endurance is low is assigned to the read cache, and the management tables of data in these caches are stored in the nonvolatile memory whose write endurance is high. Alternatively, nonvolatile memory that has a fast write speed but has a slow read speed is adopted for the write cache and nonvolatile memory that has a fast read speed but has a slow write speed is adopted for the read cache.Type: ApplicationFiled: August 3, 2011Publication date: March 1, 2012Applicant: HITACHI, LTD.Inventors: Yukie HIRATSUKA, Seiji MIURA, Yukihide INAGAKI
-
Patent number: 8117489Abstract: A disk drive. The disk drive includes a non-volatile memory that is incapable of being overwritten more than a limited number of times, a disk and a controller. The controller includes a memory management table used to manage a correlation between a logical block address (LBA) and a physical address of the non-volatile memory. In the absence of a replaceable region in the non-volatile memory and in response to an occurrence of a failure to write data in a region, defined as a failure region, in the non-volatile memory at a first physical address correlated with a first LBA, the controller is configured to write the data at a second physical address correlated with a second LBA of the non-volatile memory different from the first LBA, and is configured to correlate in the memory management table the first LBA with the second physical address.Type: GrantFiled: June 5, 2009Date of Patent: February 14, 2012Assignee: Hitachi Global Storage Technologies, Netherlands B.V.Inventors: Yukie Hiratsuka, Hideki Saga
-
Publication number: 20090307525Abstract: A disk drive. The disk drive includes a non-volatile memory that is incapable of being overwritten more than a limited number of times, a disk and a controller. The controller includes a memory management table used to manage a correlation between a logical block address (LBA) and a physical address of the non-volatile memory. In the absence of a replaceable region in the non-volatile memory and in response to an occurrence of a failure to write data in a region, defined as a failure region, in the non-volatile memory at a first physical address correlated with a first LBA, the controller is configured to write the data at a second physical address correlated with a second LBA of the non-volatile memory different from the first LBA, and is configured to correlate in the memory management table the first LBA with the second physical address.Type: ApplicationFiled: June 5, 2009Publication date: December 10, 2009Inventors: Yukie Hiratsuka, Hideki Saga
-
Patent number: 7624228Abstract: A processing speed is improved when there is a pattern in which read requests making access to continuous areas in an LBA space repeatedly alternate with write requests making access to continuous or non-continuous areas in the LBA space. In one embodiment, when the pattern in which read requests making access to continuous areas in an LBA space repeatedly alternate with write requests making access to continuous or non-continuous areas in the LBA space is extracted or a notice that the pattern has occurred is given from a host, write data required by write requests is buffered while executing read requests, and when this buffering of the write data is started, the position at which write data is started to be written is set to a position where the capacity of the buffered write data maximizes, taking account of the ratio of the amount of data transferred to a cache memory during reading to the amount of data transferred to the cache memory during writing.Type: GrantFiled: June 28, 2006Date of Patent: November 24, 2009Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Yukie Hiratsuka, Manabu Nishikawa, Hiroaki Inoue
-
Patent number: 7539820Abstract: Embodiments of the invention allow cache control optimized for the processing characteristics of application programs, and thus improve data transfer efficiency. In one embodiment, a disk device includes a disk; a cache for temporarily saving data that was read in from the disk, and data that was transferred from a host; and a controller for controlling data transfer between the cache and the host and between the cache and the disk; in which an independent cache area is set for each command type for application programs each different in data-processing policy can be set in the cache, and efficient read-ahead that utilizes the accessibility of the application programs each different in data-processing policy, can be realized by controlling the manner of read-ahead for each command type.Type: GrantFiled: April 19, 2005Date of Patent: May 26, 2009Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventor: Yukie Hiratsuka
-
Patent number: 7535666Abstract: A rotation speed of a disk-type storage medium is suitably controlled in order to save power and to reduce noise in a disk-type storage medium driving apparatus provided with one or more communication interfaces. A disk-type storage medium driving apparatus that can switch rotation speed of a disk-type storage medium, to drive the disk-type storage medium, includes one or more communication interface units, which perform data transfer to and from peripheral devices; and a control unit that judges necessity of switching a rotation speed of the disk-type storage medium when there occurs a data transfer request through one of the communication interface units.Type: GrantFiled: July 24, 2007Date of Patent: May 19, 2009Assignee: Hitachi, Ltd.Inventors: Yukie Hiratsuka, Yukihide Inagaki
-
Patent number: 7487290Abstract: Where realtime performance-critical processing is executed in parallel with data integrity-critical processing, embodiments of the invention improve the realtime performance by raising the data transfer efficiency for sequential access-dominant realtime processing. In one embodiment, if a non-realtime processing command is received while read-ahead is in progress for a realtime processing command, processing of the non-realtime processing command is not started until a certain amount of data is cached. In addition, in order to prevent the periodicity disturbance of realtime processing, when the processing of the non-realtime processing command is postponed, the read-ahead is continued maximally until the timestamp at which the next realtime processing command is expected to be issued.Type: GrantFiled: July 15, 2005Date of Patent: February 3, 2009Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Yukie Hiratsuka, Manabu Nishikawa
-
Patent number: 7461219Abstract: Embodiments of the invention ensure both a realtime nature of a realtime processing and data integrity of a non-realtime processing and perform the both processings efficiently when the realtime processing and the non-realtime processing are performed simultaneously. In one embodiment, a time limit is set not only for a realtime processing command but also for a non-realtime processing command and, if the execution of the non-realtime processing command is not completed within the set time limit, the execution of the non-realtime processing command is interrupted forcibly and a host is informed of a data transfer status at the time of the interruption so that the host can restart the interrupted processing based on the data transfer status of the interrupted processing when a time that can be allocated for the non-realtime processing command occurs again.Type: GrantFiled: April 22, 2005Date of Patent: December 2, 2008Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Yukie Hiratsuka, Yukihide Inagaki, Tetsuya Uemura
-
Patent number: 7457073Abstract: Embodiments in accordance with the present invention allow a magnetic disk drive to achieve noise reduction and low power consumption through rotation at a low speed and a high transfer rate through rotation at a high speed while allowing reliability to be maintained and achieving an improved recording density. An embodiment of a magnetic disk drive in accordance with the present invention includes, a magnetic disk medium driven at a plurality of rotational speeds, a magnetic head for recording and reproducing data in and from the magnetic disk medium, a heater for controlling a flying height of the magnetic head, and a control unit for controlling the current to the heater, and in that the control unit controls the current to the heater. The control unit controls the current to the heater according to the plurality of rotational speeds.Type: GrantFiled: February 14, 2007Date of Patent: November 25, 2008Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Masayuki Kurita, Yukie Hiratsuka, Mikio Tokuyama, Hideaki Tanaka
-
Publication number: 20080024903Abstract: A rotation speed of a disk-type storage medium is suitably controlled in order to save power and to reduce noise in a disk-type storage medium driving apparatus provided with one or more communication interfaces. A disk-type storage medium driving apparatus that can switch rotation speed of a disk-type storage medium, to drive the disk-type storage medium, includes one or more communication interface units, which perform data transfer to and from peripheral devices; and a control unit that judges necessity of switching a rotation speed of the disk-type storage medium when there occurs a data transfer request through one of the communication interface units.Type: ApplicationFiled: July 24, 2007Publication date: January 31, 2008Inventors: Yukie Hiratsuka, Yukihide Inagaki
-
Publication number: 20070276993Abstract: Embodiments in accordance with the present invention increase a hit ratio of cache by deciding an access area for reading ahead using a latency time based on the feature of an access pattern. A disk unit comprises preceding data reading ahead means for reading the preceding data of read request data, succeeding data reading ahead means for reading ahead the succeeding data of read request data, and means for extracting the feature of the access pattern by monitoring the command.Type: ApplicationFiled: May 9, 2007Publication date: November 29, 2007Applicant: Hitachi Global Storage Techologies Netherlands B.V.Inventor: Yukie Hiratsuka
-
Publication number: 20070188908Abstract: Embodiments in accordance with the present invention allow a magnetic disk drive to achieve noise reduction and low power consumption through rotation at a low speed and a high transfer rate through rotation at a high speed while allowing reliability to be maintained and achieving an improved recording density. An embodiment of a magnetic disk drive in accordance with the present invention includes, a magnetic disk medium driven at a plurality of rotational speeds, a magnetic head for recording and reproducing data in and from the magnetic disk medium, a heater for controlling a flying height of the magnetic head, and a control unit for controlling the current to the heater, and in that the control unit controls the current to the heater. The control unit controls the current to the heater according to the plurality of rotational speeds.Type: ApplicationFiled: February 14, 2007Publication date: August 16, 2007Applicant: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Masayuki Kurita, Yukie Hiratsuka, Mikio Tokuyama, Hideaki Tanaka
-
Publication number: 20070005884Abstract: A processing speed is improved when there is a pattern in which read requests making access to continuous areas in an LBA space repeatedly alternate with write requests making access to continuous or non-continuous areas in the LBA space. In one embodiment, when the pattern in which read requests making access to continuous areas in an LBA space repeatedly alternate with write requests making access to continuous or non-continuous areas in the LBA space is extracted or a notice that the pattern has occurred is given from a host, write data required by write requests is buffered while executing read requests, and when this buffering of the write data is started, the position at which write data is started to be written is set to a position where the capacity of the buffered write data maximizes, taking account of the ratio of the amount of data transferred to a cache memory during reading to the amount of data transferred to the cache memory during writing.Type: ApplicationFiled: June 28, 2006Publication date: January 4, 2007Applicant: Hitachi Global Storage Technologies Netherlands .B.V.Inventors: Yukie Hiratsuka, Manabu Nishikawa, Hiroaki Inoue
-
Patent number: 7149930Abstract: The present invention provides a disk unit suitable for recording and reproducing time-series continuous data such as AV data. When data received as data to be written into recording medium is audio and/or video data, (this data is called AV data hereinafter), address information 403c identifying a beginning sector of the recording medium in which the data has been written is registered in file control information 402. Also, it is determined whether or not the AV data is contiguous with AV data just before written. If it is contiguous, the beginning sector is not registered in control information storage means. Thus continuous data can be handled as one piece of data.Type: GrantFiled: October 31, 2002Date of Patent: December 12, 2006Assignee: Hitachi Global Storage Technologies Japan, Ltd.Inventors: Hitoshi Ogawa, Seiichi Domyo, Yukie Hiratsuka
-
Publication number: 20060015682Abstract: Where realtime performance-critical processing is executed in parallel with data integrity-critical processing, embodiments of the invention improve the realtime performance by raising the data transfer efficiency for sequential access-dominant realtime processing. In one embodiment, if a non-realtime processing command is received while read-ahead is in progress for a realtime processing command, processing of the non-realtime processing command is not started until a certain amount of data is cached. In addition, in order to prevent the periodicity disturbance of realtime processing, when the processing of the non-realtime processing command is postponed, the read-ahead is continued maximally until the timestamp at which the next realtime processing command is expected to be issued.Type: ApplicationFiled: July 15, 2005Publication date: January 19, 2006Applicant: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Yukie Hiratsuka, Manabu Nishikawa