Abstract: A signal amplifying circuit for an MR element in which a first terminal of a selected MR element is connected to input of an amplifier through a first resistor as well as to a second input of the amplifier through a second resistor, and a second terminal of the MR element is connected to the input of the amplifier through a capacitor. The effect of an offset voltage generated in the MR element can be suppressed to minimum with a simple configuration.

Abstract: A polarity detector wherein voltage-to-current converters (21, 22) connected to transmission paths (1, 2) output currents according to potentials at the transmission paths (1, 2), respectively, and a current adder (23) adds the currents together. A current-to-voltage converter (24) converts the added current into the voltage (14). And comparators, whose offset voltage is less than 0 V (for example, -5 V) or more than 0 V (for example, 5 V) compare the output voltage (14) with a reference voltage to output signals indicative of whether the output voltage (14) is within a predetermined range, or more than the upper limit of the predetermined range, or less than the lower limit of the predetermined range. The polarity detector for discriminating the polarity of the plurality of transmission paths supplying signals and DC voltages is thus integrated, thereby reducing parts thereof.

Abstract: A very dense polarity detection circuit which detects the polarity of a dc voltage on a transmission line. When incorporating such a very sense detection circuit, a semiconductor integrated circuit device is formed of a reduced number of parts. The polarity detection circuit for detecting the polarities of dc voltages on transmission lines (51) and (52) includes an input circuit (4), a clamp circuit (5), a comparison circuit (6) and a control circuit (7). The input circuit (4) has a high input impedance and receives a voltage-divide potential at a predetermined ratio. The clamp circuit (5) clamps outputs of the input circuit (4) at a predetermined voltage so that outputs from the clamp circuit (5) are not each smaller than a ground potential by a preselected voltage. The outputs of clamp circuit (5) are supplied to the comparison circuit (6) and the control circuit (7).