Patents by Inventor Yukihiro Ishimaru
Yukihiro Ishimaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8878559Abstract: An IC current measuring apparatus is provided between an IC and a substrate. The IC current measuring apparatus electrically connects each of a plurality of IC-facing terminals and a different one of a plurality of substrate-facing terminals. Especially, resistances are each inserted into a path between an IC terminal targeted for measurement and a substrate terminal corresponding thereto. Furthermore, the IC current measuring apparatus is provided with terminals each used to measure a voltage between both ends of an inserted resistance corresponding thereto. Accordingly, a measurer who measures current flowing through an IC-facing terminal can measure the current flowing through the IC-facing terminal by providing the IC current measuring apparatus between the IC targeted for measurement and the substrate and measuring a voltage between both ends of an inserted resistance corresponding to the IC terminal through which current he/she wishes to measure flows.Type: GrantFiled: April 19, 2011Date of Patent: November 4, 2014Assignee: Panasonic CorporationInventors: Takeshi Nakayama, Yoshiyuki Saito, Masahiro Ishii, Kouichi Ishino, Yukihiro Ishimaru
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Patent number: 8810035Abstract: A bonding structure body in which a semiconductor element and an electrode are bonded via a solder material, wherein a part that allows bonding has a first intermetallic compound layer that has been formed on the electrode side, a second intermetallic compound layer that has been formed on the semiconductor element side, and a third layer that is constituted by a phase containing Sn and a sticks-like intermetallic compound part, which is sandwiched between the two layers of the first intermetallic compound layer and the second intermetallic compound layer, and the sticks-like intermetallic compound part is interlayer-bonded to both of the first intermetallic compound layer and the second intermetallic compound layer.Type: GrantFiled: October 17, 2011Date of Patent: August 19, 2014Assignee: Panasonic CorporationInventors: Taichi Nakamura, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Yukihiro Ishimaru
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Patent number: 8675369Abstract: A module board has a configuration in which a first circuit board, a first composite sheet, a second circuit board, a second composite sheet, and a third circuit board are laminated in this order. Inspection terminals are arranged in a matrix shape in a predetermined region on an upper surface of the third circuit board. Electronic components are mounted on the first and second circuit boards. The inspection terminals are electrically connected to the electronic components mounted on the first and second circuit boards through vias and wiring patterns.Type: GrantFiled: November 18, 2011Date of Patent: March 18, 2014Assignee: Panasonic CorporationInventors: Masahiro Takatori, Yukihiro Ishimaru
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Publication number: 20130241069Abstract: A bonding structure body in which a semiconductor element and an electrode are bonded via a solder material, wherein a part that allows bonding has a first intermetallic compound layer that has been formed on the electrode side, a second intermetallic compound layer that has been formed on the semiconductor element side, and a third layer that is constituted by a phase containing Sn and a sticks-like intermetallic compound part, which is sandwiched between the two layers of the first intermetallic compound layer and the second intermetallic compound layer, and the sticks-like intermetallic compound part is interlayer-bonded to both of the first intermetallic compound layer and the second intermetallic compound layer.Type: ApplicationFiled: October 17, 2011Publication date: September 19, 2013Applicant: Panasonic CorporationInventors: Taichi Nakamura, Akio Furusawa, Shigeaki Sakatani, Hidetoshi Kitaura, Yukihiro Ishimaru
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Publication number: 20120112737Abstract: Provided is an IC current measuring apparatus provided between an IC and a substrate. The IC current measuring apparatus electrically connects each of a plurality of IC-facing terminals and a different one of a plurality of substrate-facing terminals. Especially, resistances are each inserted into a path between an IC terminal targeted for measurement and a substrate terminal corresponding thereto. Furthermore, the IC current measuring apparatus is provided with terminals each used to measure a voltage between both ends of an inserted resistance corresponding thereto. Accordingly, a measurer who measures current flowing through an IC-facing terminal can measure the current flowing through the IC-facing terminal by providing the IC current measuring apparatus between the IC targeted for measurement and the substrate and measuring a voltage between both ends of an inserted resistance corresponding to the IC terminal through which current he/she wishes to measure flows.Type: ApplicationFiled: April 19, 2011Publication date: May 10, 2012Inventors: Takeshi Nakayama, Yoshiyuki Saito, Masahiro Ishii, Kouichi Ishino, Yukihiro Ishimaru
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Publication number: 20120063110Abstract: A module board has a configuration in which a first circuit board, a first composite sheet, a second circuit board, a second composite sheet, and a third circuit board are laminated in this order. Inspection terminals are arranged in a matrix shape in a predetermined region on an upper surface of the third circuit board. Electronic components are mounted on the first and second circuit boards. The inspection terminals are electrically connected to the electronic components mounted on the first and second circuit boards through vias and wiring patterns.Type: ApplicationFiled: November 18, 2011Publication date: March 15, 2012Applicant: PANASONIC CORPORATIONInventors: Masahiro TAKATORI, Yukihiro ISHIMARU
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Patent number: 8077478Abstract: A module board has a configuration in which a first circuit board, a first composite sheet, a second circuit board, a second composite sheet, and a third circuit board are laminated in this order. Inspection terminals are arranged in a matrix shape in a predetermined region on an upper surface of the third circuit board. Electronic components are mounted on the first and second circuit boards. The inspection terminals are electrically connected to the electronic components mounted on the first and second circuit boards through vias and wiring patterns.Type: GrantFiled: March 15, 2006Date of Patent: December 13, 2011Assignee: Panasonic CorporationInventors: Masahiro Takatori, Yukihiro Ishimaru
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Patent number: 7752749Abstract: One of an electrode terminal of an electronic component and a connecting terminal of a wiring substrate is provided with solder beforehand, one of the wiring substrate and the electronic component is secured, and the electrode terminal and the connecting terminal are made to abut each other so that one of the wiring substrate and the electronic component, whichever is not secured, is held. The electronic component is heated so that the solder melts, and the solder is solidified while the electronic component is held, so that the electrode terminal and the connecting terminal are bonded to each other by the solder. Further, while an interval formed between the wiring substrate and the electronic component by the melted solder is being held, the electrode terminal and the connecting terminal are finely moved relative to each other with reference to a surface of the wiring substrate in an XY? direction.Type: GrantFiled: March 17, 2006Date of Patent: July 13, 2010Assignee: Panasonic CorporationInventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Shinobu Masuda, Satoru Tomekawa
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Patent number: 7649267Abstract: A highly reliable, high-productivity package equipped with a semiconductor chip, and a method for producing the same. In a package (100) comprising a semiconductor chip (10) and a mounting substrate (30), a plurality of electrode terminals (12) are formed on the surface (10a) of the semiconductor chip (10) opposing the mounting substrate side, connection terminals (32) respectively corresponding to the plurality of electrode terminals (12), are formed on the mounting substrate (30), the connection terminals (32) on the mounting substrate (30) and the electrode terminals (12) are electrically connected collectively by solder bumps (17) formed in self-assembly, an electrode pattern (20) not connected with the electrode terminals (12) and the connection terminals (32) is formed on the chip surface (10a) or the surface (35) of the mounting substrate (30) corresponding to the chip surface (10a), and solder (19) is accumulated on the electrode pattern (20).Type: GrantFiled: March 8, 2006Date of Patent: January 19, 2010Assignee: Panasonic CorporationInventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Seiji Karashima, Seiichi Natkatani, Hiroki Yabe
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Publication number: 20090202142Abstract: A circuit board according to the present invention comprises an insulating layer, a first electronic component mounted on the insulating layer, and a solder marker provided on the insulating layer. A first solder having a first melting point constitutes the solder marker. The first electronic component is mounted on the insulating layer via a second solder having a second melting point lower than the first melting point.Type: ApplicationFiled: March 30, 2007Publication date: August 13, 2009Inventors: Yukihiro Ishimaru, Toshiyuki Kojima, Rikiya Okimoto
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Publication number: 20090115067Abstract: An electronic component embedded module that can improve reliability of electric connection of inner vias, and a manufacturing method therefor are provided. A first electronic component (11) is embedded in a second electrical insulating layer (13) and connected electrically to a first wiring pattern (14) through first inner vias (16) that penetrate a first electrical insulating layer (12). The first wiring pattern (14) and a second wiring pattern (15) are connected electrically to each other through second inner vias (17) that penetrate the first electrical insulating layer (12) and third inner vias (18) that penetrate the second electrical insulating layer (13). The second inner vias (17) and the third inner vias (18) are arranged continuously.Type: ApplicationFiled: November 16, 2006Publication date: May 7, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Rikiya Okimoto, Toshiyuki Kojima, Yukihiro Ishimaru
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Publication number: 20090049687Abstract: [Problem] To improve productivity and reliability in mounting an electronic component. [Means for Solving Problems] At least one of an electrode terminal of an electronic component and a connecting terminal of a wiring substrate is provided with solder beforehand, one of the wiring substrate and the electronic component is secured, and the electrode terminal of the electronic component and the connecting terminal of the wiring substrate are made to abut each other in a state where one of the wiring substrate and the electronic component, whichever is not secured, is held. Then, the electronic component is heated so that the solder is melted, and the solder is solidified while the electronic component is held, so that the electrode terminal and the connecting terminal are bonded to each other by means of the solder.Type: ApplicationFiled: March 17, 2006Publication date: February 26, 2009Inventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Shinobu Masuda, Satoru Tomekawa
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Publication number: 20080298023Abstract: An electronic component-containing module includes an electrically insulating substrate; and a first electronic component and second electronic component embedded in the electrically insulating substrate, wherein the first electronic component protrudes partially from at least one surface of the electrically insulating substrate, and the second electronic component is contained in the electrically insulating substrate.Type: ApplicationFiled: May 27, 2008Publication date: December 4, 2008Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Rikiya Okimoto, Tsukasa Shiraishi, Yukihiro Ishimaru, Toshiyuki Kojima
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Publication number: 20080296053Abstract: A method of manufacturing an electronic component module includes mounting an electronic component on at least one surface of a first board, subsequently inspecting the first board for functions, forming a resin layer burying or covering the electronic component on the one surface of the first board to flatten the one surface side of the first board, aligningly stacking the first board, a plate-like member and a second board so that the other surface of the first board is opposite one surface of the plate-like member and so that the other surface of the plate-like member is opposite one surface of the second board, pressurizing the first board, the plate-like member and the second board which have been stacked, and heating the first board, the plate-like member, and the second board which have been stacked.Type: ApplicationFiled: May 27, 2008Publication date: December 4, 2008Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yukihiro Ishimaru, Toshiyuki Kojima, Rikiya Okimoto
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Publication number: 20080265437Abstract: A highly reliable, high-productivity package equipped with a semiconductor chip, and a method for producing the same. In a package (100) comprising a semiconductor chip (10) and a mounting substrate (30), a plurality of electrode terminals (12) are formed on the surface (10a) of the semiconductor chip (10) opposing the mounting substrate side, connection terminals (32) respectively corresponding to the plurality of electrode terminals (12), are formed on the mounting substrate (30), the connection terminals (32) on the mounting substrate (30) and the electrode terminals (12) are electrically connected collectively by solder bumps (17) formed in self-assembly, an electrode pattern (20) not connected with the electrode terminals (12) and the connection terminals (32) is formed on the chip surface (10a) or the surface (35) of the mounting substrate (30) corresponding to the chip surface (10a), and solder (19) is accumulated on the electrode pattern (20).Type: ApplicationFiled: March 8, 2006Publication date: October 30, 2008Inventors: Tsukasa Shiraishi, Yukihiro Ishimaru, Seiji Karashima, Seiichi Natkatani, Hiroki Yabe
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Publication number: 20080205016Abstract: A module board has a configuration in which a first circuit board, a first composite sheet, a second circuit board, a second composite sheet, and a third circuit board are laminated in this order. Inspection terminals are arranged in a matrix shape in a predetermined region on an upper surface of the third circuit board. Electronic components are mounted on the first and second circuit boards. The inspection terminals are electrically connected to the electronic components mounted on the first and second circuit boards through vias and wiring patterns.Type: ApplicationFiled: March 15, 2006Publication date: August 28, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masahiro Takatori, Yukihiro Ishimaru
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Patent number: 7346051Abstract: A stacked device is disclosed which is easily manufactured while identifying a plurality of devices that are stacked in the stacked device. The stacked device includes a stack of a plurality of slave devices and a master device having identical terminal arrangements. Here, the master device includes command transmission unit configured to input an identification command to a terminal of an adjacent slave device.Type: GrantFiled: June 10, 2005Date of Patent: March 18, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takeshi Nakayama, Eiji Takahashi, Yoshiyuki Saito, Yukihiro Ishimaru, Hideki Iwaki
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Patent number: 7341890Abstract: A circuit board with an built-in electronic component according to the present invention includes an insulating layer, a first wiring pattern provided on a first main surface of the insulating layer, a second wiring pattern provided on a second main surface different from the first main surface of the insulating layer, and an electronic component such as a semiconductor chip or the like provided in an internal portion of the insulating layer. The electronic component includes a first external connection terminal formed on a first surface and a second external connection terminal formed on a second surface different from the first surface. The first external connection terminal is connected electrically to the first wiring pattern, and the second external connection terminal is connected electrically to the second wiring pattern.Type: GrantFiled: June 28, 2006Date of Patent: March 11, 2008Assignee: Matsushita Industrial Co., Ltd.Inventors: Yukihiro Ishimaru, Tousaku Nishiyama, Yasuhiro Sugaya, Toshiyuki Asahi
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Publication number: 20070124926Abstract: In a circuit board according to the present invention, on a substrate, in at least a portion of a phase change layer including a phase change material that is capable of changing alternately between an electrically insulating state and an electrically conductive state, a conductive path is formed that has been put into an electrically conductive state by a phase change in the phase change layer, wherein the phase change material includes a chalcogenide semiconductor, changes between the electrically insulating state and the electrically conductive state by irradiation of laser light, goes into the electrically conductive state in a crystalline phase, and goes into the electrically insulating state in an amorphous phase.Type: ApplicationFiled: February 13, 2007Publication date: June 7, 2007Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Yukihiro Ishimaru, Seiichi Nakatani, Yoshiyuki Saito
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Publication number: 20070069393Abstract: A double-sided or multilayer wiring board having high-density wiring is obtained by embedding a spherical semiconductor element in an electrically insulating substrate which composes the wiring board, and a thin electronic device can be provided using such a wiring board. Furthermore, a flexible double-sided or multilayer wiring board which is capable of being housed in a limited space while keeping a desired form can be provided by embedding the spherical semiconductor element, and a thin electronic device can be provided using a variety of such wiring boards by imparting different types of flexibility to desired parts of such a wiring board as required.Type: ApplicationFiled: July 22, 2004Publication date: March 29, 2007Inventors: Toshiyuki Asahi, Yukihiro Ishimaru, Tousaku Nishiyama, Seiichi Nakatani, Yasuhiro Sugaya