Patents by Inventor Yukihiro Kawata

Yukihiro Kawata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5523593
    Abstract: By forming an isolated semiconductor layer or electrode layer on a semiconductor surface between neighboring field effect transistors and element separating trenches which are deep enough to reach at least the semi-insulating substrate or the hetero junction interface on the buffer layer, low frequency oscillation of a compound semiconductor integrated circuit can be reduced. By controlling the thickness of the buffer layer having a hetero junction to at most 150 nm, the low frequency oscillation can be reduced. By forming materials separating adjacent elements with a width of at most 2 .mu.m which reach from the element region surface to the buffer layer having hetero junction so as to enclose the element regions and etched regions in the neighborhood of the elements or so as to enclose the element regions in the etched regions and by controlling the angle of the sides of the etched regions against the semiconductor layer surface to 10.degree. to 60.degree., wires can be prevented from short-circuiting.
    Type: Grant
    Filed: March 25, 1993
    Date of Patent: June 4, 1996
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corporation
    Inventors: Osamu Kagaya, Hiroyuki Takazawa, Yoshinori Imamura, Junji Shigeta, Yukihiro Kawata, Hiroto Oda