Patents by Inventor Yukihiro Kitamura
Yukihiro Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230298961Abstract: An insulating substrate in which one principal surface of a heat-dissipation-side metal plate is bonded to one principal surface of a ceramic substrate via a brazing material layer provided therebetween, and a solder resist portion is formed on at least one selected from a periphery of the other principal surface of the heat-dissipation-side metal plate, a side surface of the heat-dissipation-side metal plate, and a surface of the brazing material layer. A solder resist prevents solder from wrapping around the brazing material layer, and thereby, what is called “the brazing material layer leaching into solder” no longer occurs and the occurrence of cracks inside the brazing material layer is avoided. This prevents stress concentration from occurring in the ceramic substrate at an inner portion relative to an end portion of the heat-dissipation-side metal plate.Type: ApplicationFiled: June 29, 2021Publication date: September 21, 2023Applicant: DOWA METALTECH CO., LTD.Inventors: Seiya YUKI, Takashi IDENO, Eitarou SATOU, Yukihiro KITAMURA
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Patent number: 11749581Abstract: Provided are a semiconductor module in which bonding properties between an insulated substrate and a sealing resin is improved and a method for manufacturing the semiconductor module. A semiconductor module 50 is provided with: an insulated substrate 23; a circuit pattern 24 that is formed on the insulated substrate; semiconductor elements 25, 26 that are joined on the circuit pattern; and a sealing resin 28 for sealing the insulated substrate, the circuit pattern, and the semiconductor elements. The surface 23a of the insulated substrate in a part where the insulative substrate and the sealing resin are bonded to each other, is characterized in that, in a cross section of the insulated substrate, the average roughness derived in a 300-?m wide range is 0.15 ?m or greater and the average roughness derived in a 3-?m-wide range is 0.02 ?m or greater.Type: GrantFiled: February 6, 2019Date of Patent: September 5, 2023Assignees: FUJI ELECTRIC CO., LTD., DOWA METAL TECH CO., LTD.Inventors: Yuhei Nishida, Fumihiko Momose, Takashi Ideno, Yukihiro Kitamura
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Publication number: 20230268245Abstract: An insulating substrate in which one principal surface of a heat-dissipation-side metal plate is brazed to one principal surface of a ceramic substrate via a brazing material layer provided therebetween, in which a Ni plating layer that covers the brazing material layer exposed between the ceramic substrate and the heat-dissipation-side metal plate is provided, and at least a portion of the other principal surface of the heat-dissipation-side metal plate is not covered with a Ni plating layer, leaving the surface of the heat-dissipation-side metal plate exposed. According to the present invention, it becomes possible to obtain the insulating substrate having excellent furnace passing resistance of the insulating substrate (alone) and further having excellent heat cycle characteristics in a state of a heat sink plate being soldered to the insulating substrate.Type: ApplicationFiled: June 29, 2021Publication date: August 24, 2023Applicant: DOWA METALTECH CO., LTD.Inventors: Seiya YUKI, Takashi IDENO, Junichi KINOSHITA, Yukihiro KITAMURA
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Publication number: 20200388553Abstract: Provided are a semiconductor module in which bonding properties between an insulated substrate and a sealing resin is improved and a method for manufacturing the semiconductor module. A semiconductor module 50 is provided with: an insulated substrate 23; a circuit pattern 24 that is formed on the insulated substrate; semiconductor elements 25, 26 that are joined on the circuit pattern; and a sealing resin 28 for sealing the insulated substrate, the circuit pattern, and the semiconductor elements. The surface 23a of the insulated substrate in a part where the insulative substrate and the sealing resin are bonded to each other, is characterized in that, in a cross section of the insulated substrate, the average roughness derived in a 300-?m wide range is 0.15 ?m or greater and the average roughness derived in a 3-?m-wide range is 0.02 ?m or greater.Type: ApplicationFiled: February 6, 2019Publication date: December 10, 2020Inventors: Yuhei NISHIDA, Fumihiko MOMOSE, Takashi IDENO, Yukihiro KITAMURA
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Patent number: 9944565Abstract: After a wet blasting treatment for jetting a slurry, which contains spherical alumina as abrasive grains in a liquid, to the surface of a ceramic substrate 10 of aluminum nitride sintered body so that the ceramic substrate 10 has a residual stress of not higher than ?50 MPa and so that the surface of the ceramic substrate 10 to be bonded to the metal plate 14 has an arithmetic average roughness Ra of 0.15 to 0.30 ?m, a ten-point average roughness Rz of 0.7 to 1.1 ?m and a maximum height Ry of 0.9 to 1.Type: GrantFiled: November 20, 2012Date of Patent: April 17, 2018Assignees: DOWA METALTECH CO., LTD., TOKUYAMA CORPORATIONInventors: Hideyo Osanai, Yukihiro Kitamura, Hiroto Aoki, Yukihiro Kanechika, Ken Sugawara, Yasuko Takeda
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Publication number: 20150284296Abstract: After a wet blasting treatment for jetting a slurry, which contains spherical alumina as abrasive grains in a liquid, to the surface of a ceramic substrate 10 of aluminum nitride sintered body so that the ceramic substrate 10 has a residual stress of not higher than ?50 MPa and so that the surface of the ceramic substrate 10 to be bonded to the metal plate 14 has an arithmetic average roughness Ra of 0.15 to 0.30 ?m, a ten-point average roughness Rz of 0.7 to 1.1 ?m and a maximum height Ry of 0.9 to 1.Type: ApplicationFiled: November 20, 2012Publication date: October 8, 2015Applicants: TOKUYAMA CORPORATION, DOWA METALTECH CO., LTDInventors: Hideyo Osanai, Yukihiro Kitamura, Hiroto Aoki, Yukihiro Kanechika, Ken Sugawara, Yasuko Takeda
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Publication number: 20060292383Abstract: To provide a metal-coated substrate capable of significantly improving an adhesion strength and stability between metal and a plastic film. By laminating a thermoplastic film layer 2 on a base body plastic film layer 3 to obtain a laminated plastic film, and a metal layer 1 is formed on the thermoplastic film layer 2, while controlling a temperature of the laminated plastic film.Type: ApplicationFiled: November 25, 2004Publication date: December 28, 2006Inventors: Shuichi Kohayashi, Akio Sawabe, Yukihiro Kitamura
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Publication number: 20060093838Abstract: A metal substrate having high strength and stability of adhesion between a metal film and a plastic film, wherein the metal film can be made thin. The plastic film as a base is placed inside a device for applying a silane coupling agent and is dried at a temperature of 300° C., after which the vaporized silane coupling agent is blown onto the plastic film while the temperature is maintained at 300° C., and the surface of the plastic film is coated with the silane coupling agent. A film of copper is formed by sputtering on the surface of the plastic film thus coated with the coupling agent, and the plastic film provided with the sputtered copper film is coated with a glossy copper coating having the desired thickness using a plating method.Type: ApplicationFiled: September 21, 2005Publication date: May 4, 2006Applicant: Dowa Mining Co., Ltd.Inventors: Shuichi Kohayashi, Akio Sawabe, Yukihiro Kitamura
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Patent number: 6858151Abstract: There is provided a method for producing a metal/ceramic bonding article, the method including the steps of: bonding a metal plate 12 of an alloy containing copper and nickel directly to at least one side of a ceramic substrate 10; applying a resist 14 on a predetermined portion of the metal plate 12 to remove an undesired portion of the metal plate 12 by etching; and removing the resist 14 to form a pattern having a predetermined shape of the alloy on the ceramic substrate 10. According to this method, it is possible to reduce the displacement failure of parts to improve productivity and to prevent bonding failure during the mounting of a semiconductor device or the like thereon.Type: GrantFiled: September 25, 2002Date of Patent: February 22, 2005Assignee: Dowa Mining Co., Ltd.Inventors: Nobuyoshi Tsukaguchi, Takayuki Takahashi, Yukihiro Kitamura, Masami Kimura
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Patent number: 6791180Abstract: In a ceramic circuit board having a ceramic substrate and a metal circuit plate bonded to one surface of the ceramic substrate, assuming that the warpage of the ceramic circuit board is a difference in height between the center and edge of the metal circuit plate and is positive (+) when the circuit board warps so as to be concave on the side of the metal circuit plate, the warpage of the ceramic circuit board is in the range of from −0.1 mm to +0.3 mm when the ceramic circuit board is heated to 350° C., and in the range of from +0.05 mm to +0.6 mm when the temperature of the ceramic circuit board is returned to a room temperature after the ceramic circuit board is heated to 350° C. The initial warpage of the ceramic circuit board is in the range of from +0.05 mm to +0.6 mm.Type: GrantFiled: March 11, 2003Date of Patent: September 14, 2004Assignee: Dowa Mining Co., Ltd.Inventors: Yukihiro Kitamura, Takayuki Takahashi, Mitsuru Ohta, Yuji Ogawa
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Patent number: 6780520Abstract: There is provided a method for producing a metal/ceramic bonding article, the method including the steps of: bonding a metal plate 12 of an alloy containing copper and nickel directly to at least one side of a ceramic substrate 10; applying a resist 14 on a predetermined portion of the metal plate 12 to remove an undesired portion of the metal plate 12 by etching; and removing the resist 14 to form a pattern having a predetermined shape of the alloy on the ceramic substrate 10. According to this method, it is possible to reduce the displacement failure of parts to improve productivity and to prevent bonding failure during the mounting of a semiconductor device or the like thereon.Type: GrantFiled: January 27, 2003Date of Patent: August 24, 2004Assignee: Dowa Mining Co., Ltd.Inventors: Nobuyoshi Tsukaguchi, Takayuki Takahashi, Yukihiro Kitamura, Masami Kimura
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Publication number: 20040149689Abstract: There is provided a method for producing a metal/ceramic bonding substrate, the method being capable of improving the linearity of a pattern and preventing the occurrence of defective plating to improve the visual failure of plating and ensure the adhesion of plating.Type: ApplicationFiled: December 3, 2002Publication date: August 5, 2004Inventors: Xiao-Shan Ning, Nobuyoshi Tsukaguchi, Masami Kimura, Kazuhiko Namioka, Yukihiro Kitamura
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Publication number: 20030232204Abstract: There is provided a method for producing a metal/ceramic bonding article, the method including the steps of: bonding a metal plate 12 of an alloy containing copper and nickel directly to at least one side of a ceramic substrate 10; applying a resist 14 on a predetermined portion of the metal plate 12 to remove an undesired portion of the metal plate 12 by etching; and removing the resist 14 to form a pattern having a predetermined shape of the alloy on the ceramic substrate 10. According to this method, it is possible to reduce the displacement failure of parts to improve productivity and to prevent bonding failure during the mounting of a semiconductor device or the like thereon.Type: ApplicationFiled: September 25, 2002Publication date: December 18, 2003Inventors: Nobuyoshi Tsukaguchi, Takayuki Takahashi, Yukihiro Kitamura, Masami Kimura
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Publication number: 20030232205Abstract: There is provided a method for producing a metal/ceramic bonding article, the method including the steps of: bonding a metal plate 12 of an alloy containing copper and nickel directly to at least one side of a ceramic substrate 10; applying a resist 14 on a predetermined portion of the metal plate 12 to remove an undesired portion of the metal plate 12 by etching; and removing the resist 14 to form a pattern having a predetermined shape of the alloy on the ceramic substrate 10. According to this method, it is possible to reduce the displacement failure of parts to improve productivity and to prevent bonding failure during the mounting of a semiconductor device or the like thereon.Type: ApplicationFiled: January 27, 2003Publication date: December 18, 2003Inventors: Nobuyoshi Tsukaguchi, Takayuki Takahashi, Yukihiro Kitamura, Masami Kimura
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Publication number: 20030173660Abstract: In a ceramic circuit board having a ceramic substrate and a metal circuit plate bonded to one surface of the ceramic substrate, assuming that the warpage of the ceramic circuit board is a difference in height between the center and edge of the metal circuit plate and is positive (+) when the circuit board warps so as to be concave on the side of the metal circuit plate, the warpage of the ceramic circuit board is in the range of from −0.1 mm to +0.3 mm when the ceramic circuit board is heated to 350° C., and in the range of from +0.05 mm to +0.6 mm when the temperature of the ceramic circuit board is returned to a room temperature after the ceramic circuit board is heated to 350° C. The initial warpage of the ceramic circuit board is in the range of from +0.05 mm to +0.6 mm.Type: ApplicationFiled: March 11, 2003Publication date: September 18, 2003Inventors: Yukihiro Kitamura, Takayuki Takahashi, Mitsuru Ohta, Yuji Ogawa
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Patent number: 6383962Abstract: An aluminum nitride sintered product which is made mainly of aluminum nitride and contains an yttrium compound in an amount of from 0.6 to 5 wt % as calculated as yttrium oxide, a vanadium compound in an amount of from 0.02 to 0.4 wt % as calculated as vanadium and carbon in an amount of from 0.03 to 0.10 wt % and which has a three-point bending strength of at least 45 kg/mm and a thermal conductivity of at least 150 W/m·K, wherein crystal grains of aluminum nitride have an average grain size of at most 5 &mgr;m.Type: GrantFiled: March 16, 2000Date of Patent: May 7, 2002Assignees: Asahi Techno Glass Corporation, Dowa Mining Co., Ltd.Inventors: Yoshiki Obana, Atsuo Hiroi, Kazunari Watanabe, Mikio Ueki, Yukihiro Kitamura
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Patent number: 4771551Abstract: A layout designating sheet is placed on a layout designating sheet receiving panel and light is emitted from one side thereof to illuminate illustrations provided on the layout designating sheet on to an original receiving panel overlapped there on. Being overlapped with illuminated illustrations of the layout designating sheet, angles of originals corresponding to the illustrations are adjusted on the original receiving panel. Angle data marks are applied by angle data mark supply guide means to the angle-adjusted originals or to auxiliary sheets adhered to the originals. With reference to the angle data marks, the originals are adhered to a cylinder of an input scanner. Thus, the originals can be quickly adhered to the cylinder of the input scanner at required angles.Type: GrantFiled: March 18, 1987Date of Patent: September 20, 1988Assignee: Dainippon Screen Mfg. Co., Ltd.Inventors: Mochisuke Hiroshima, Hiroya Nakamura, Yukihiro Kitamura