Abstract: A variable speed reproduction of speech from memory depending on the indication of a jog dial is accomplished by buffer memory (23) for speech sound and a jog dial (17) for controlling a read speed from this memory. Speech sound data is read out from the buffer memory (23) at a speed corresponding to the indication of the jog dial (17). The speech sound data is reproduced, independent of the jog dial (17), from a tape (13) and is written into the memory (23). A capstan motor drive circuit (18) detects the difference between the read address and the write address of the memory (23) and controls the reproduction speed of the sound speech data from the tape (13) in accordance with this difference. Since the read speed is directly controlled for the memory (23), no time delay exists between the speed command and the actual variable-speed reproduction.

Abstract: A command from a remote terminal of an editor is supplied to a system controller in an information reproducer. The system controller controls a control circuit and a reproducing circuit, and sets address information in an address output circuit. During virtual reproduction, the system controller sets virtual address information in the address output circuit, and the virtual address information signal is output to an address input terminal of the editor. A reproduced information signal from the reproducing circuit is supplied to an information input terminal of the editor via an information output circuit.

Abstract: A rotary head type recording and/or reproducing apparatus is so arranged as to be able to record on and/or reproduce from a recording track on a recording medium a time code which is not synchronized with the revolution of a rotary head, whereby even when the revolution period of the rotary head is special, the edition of the recording medium can be made with high accuracy and a track exclusively required by the time code becomes unnecessary. Also, a surplus calculating circuit for calculating a surplus when a number is divided by a divisor is disclosed, in which the surplus can be obtained only by the addition without carrying out the division in practice. Accordingly, time necessary for such calculation can be reduced and the scale of circuit arrangement can be miniaturized.