Patents by Inventor Yukihiro Mizukami

Yukihiro Mizukami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7265707
    Abstract: An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: September 4, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukihiro Mizukami, Ichirou Yamane, Kazuhisa Raita
  • Publication number: 20060238399
    Abstract: An A/D converter of an successive approximation type according to the present invention comprises a sample hold circuit, a reference voltage generating circuit, a comparator for comparing the reference voltage generated by the reference voltage generating circuit to a value of the input analog signal retained in the sample hold circuit, a control circuit for successively controlling the reference voltage generating circuit so that a value of the reference voltage approximates to the value of the input analog signal retained in the sample hold circuit, a buffering circuit for outputting an output value corresponding to an output voltage of the comparator, a latch circuit for retaining the output value of the buffering circuit corresponding to the output value of the comparator per bit as a digital value, and a buffering control circuit for blocking a power supply to the buffering circuit during the sampling period is provided.
    Type: Application
    Filed: April 20, 2006
    Publication date: October 26, 2006
    Inventors: Yukihiro Mizukami, Ichirou Yamane, Kazuhisa Raita
  • Publication number: 20060097769
    Abstract: In a level shift circuit constituted by n-channel MOS transistors (TN-A and TN-B) and p-channel MOS transistors (TP-A and TP-B), p-channel MOS transistors (TP-C and TP-D) constituting a current mirror circuit at the transistors (TP-A and TP-B), thereby limiting a direct tunneling current from VDDH to VSS and enabling high-speed operation.
    Type: Application
    Filed: October 31, 2005
    Publication date: May 11, 2006
    Applicant: Matsushita Electric Industrial Co., LTD.
    Inventors: Yukihiro Mizukami, Kazuhisa Raita
  • Patent number: 4531906
    Abstract: A lighter case having a windshield is provided. The lighter case includes a hollow case member adapted to receive therein a lighter through a top opening thereof and a windshield member adapted to be received in the case member and to receive therein at least a part of the lighter through an open side portion thereof. The case member includes a side opening for facilitating access to the windshield therethrough of the finger of a user and the windshield member includes an open bottom, so that the windshield can be slidably displaced in the longitudinal direction with respect to the case member.
    Type: Grant
    Filed: August 14, 1984
    Date of Patent: July 30, 1985
    Inventor: Yukihiro Mizukami