Patents by Inventor Yukihisa Kinugasa

Yukihisa Kinugasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9287307
    Abstract: A chip size package (CSP) includes an antenna for wireless communication, used in signal transmission and reception with external substrates, the antenna being formed as a wiring of a rewiring layer, the rewiring layer being disposed between a silicon layer and solder bumps.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: March 15, 2016
    Assignee: SONY CORPORATION
    Inventors: Yukihisa Kinugasa, Toshihiro Furusawa, Yoshiteru Kamatani, Yoshihito Higashitsutsumi
  • Patent number: 9253387
    Abstract: There is provided a camera module including: a lens; an image pickup device arranged on an optical axis of the lens; and an actuator section configured to reciprocate the image pickup device in an optical axis direction of the lens, wherein the actuator section includes a movable joint section on which the image pickup device is fixed, a parallel link mechanism section having a movable end section attached to the movable joint section and a mounting end section, and a movable element that is configured to perform displacement motion by a displacement amount depending on a level of a voltage to be applied and that is coupled to a coupling region between the movable joint section and the movable end section of the parallel link mechanism section in such a manner that the displacement motion is transmittable.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: February 2, 2016
    Assignee: SONY CORPORATION
    Inventors: Toshihiro Furusawa, Yoshihito Higashitsutsumi, Yoshiteru Kamatani, Yukihisa Kinugasa, Hideo Kawabe, Takehisa Ishida, Yusaku Kato, Nobuyuki Nagai, Masayoshi Morita, Hiroyuki Yamagishi
  • Publication number: 20150070565
    Abstract: There is provided a camera module including: a lens; an image pickup device arranged on an optical axis of the lens; and an actuator section configured to reciprocate the image pickup device in an optical axis direction of the lens, wherein the actuator section includes a movable joint section on which the image pickup device is fixed, a parallel link mechanism section having a movable end section attached to the movable joint section and a mounting end section, and a movable element that is configured to perform displacement motion by a displacement amount depending on a level of a voltage to be applied and that is coupled to a coupling region between the movable joint section and the movable end section of the parallel link mechanism section in such a manner that the displacement motion is transmittable.
    Type: Application
    Filed: February 28, 2013
    Publication date: March 12, 2015
    Applicant: SONY CORPOTATION
    Inventors: Toshihiro Furusawa, Yoshihito Higashitsutsumi, Yoshiteru Kamatani, Yukihisa Kinugasa, Hideo Kawabe, Takehisa Ishida, Yusaku Kato, Nobuyuki Nagai, Masayoshi Morita, Hiroyuki Yamagishi
  • Publication number: 20140246745
    Abstract: A chip size package (CSP) includes an antenna for wireless communication, used in signal transmission and reception with external substrates, the antenna being formed as a wiring of a rewiring layer, the rewiring layer being disposed between a silicon layer and solder bumps.
    Type: Application
    Filed: February 21, 2014
    Publication date: September 4, 2014
    Applicant: Sony Corporation
    Inventors: Yukihisa KINUGASA, Toshihiro FURUSAWA, Yoshiteru KAMATANI, Yoshihito HIGASHITSUTSUMI
  • Patent number: 8130307
    Abstract: A drive circuit applying two or more drive voltages to a charge transfer unit includes at least one current mirror circuit that receives a reference current and outputs a predetermined current; at least one switch circuit that switches the current output from the at least one current mirror circuit to apply the multiple drive voltages to the charge transfer unit; and at least one time constant circuit that gives a predetermined time constant to the reference current in the switching by the switch circuit.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: March 6, 2012
    Assignee: Sony Corporation
    Inventors: Azuma Kawabe, Hidenobu Kakioka, Fumiaki Fukuoka, Isao Hirota, Masahiro Segami, Yukihisa Kinugasa
  • Patent number: 7982538
    Abstract: A differential includes first and second current mirror circuits that provide the gates of slave transistors with gate voltages of master transistors via a voltage follower where a slew rate at a rise time is equal to a slew rate at a fall time. Thus, when the master current is increased or decreased, an incremental change in slave current and a decremental change in slave current are symmetrical with each other. The use of such current mirrors in a differential manner leads to no generation of common mode noise even in these changes.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: July 19, 2011
    Assignee: Sony Corporation
    Inventors: Hidekazu Kikuchi, Gen Ichimura, Yukihisa Kinugasa
  • Publication number: 20100120383
    Abstract: A differential includes first and second current mirror circuits that provide the gates of slave transistors with gate voltages of master transistors via a voltage follower where a slew rate at a rise time is equal to a slew rate at a fall time. Thus, when the master current is increased or decreased, an incremental change in slave current and a decremental change in slave current are symmetrical with each other. The use of such current mirrors in a differential manner leads to no generation of common mode noise even in these changes.
    Type: Application
    Filed: November 12, 2009
    Publication date: May 13, 2010
    Applicant: Sony Corporation
    Inventors: Hidekazu Kikuchi, Gen Ichimura, Yukihisa Kinugasa
  • Patent number: 7623003
    Abstract: Three devices such as electric charge-coupled devices are each included in one of three phase impedance circuits composing a 3-phase LC resonance circuit as a device having a capacitive impedance. A driver circuit applies either of a logic level of 0, a high-impedance level or a logic level of 1 to each of nodes Node_A, Node_B and Node_C of the phase impedance circuits so as to result in sequential transitions of a state of resonance among the phase impedance circuits. In an operation to drive the phase impedance circuits, either of the logic level of 0, the high-impedance level and the logic level of 1 is applied to each of the nodes so as to sustain a phase difference of 2?/3 between the phase impedance circuits. In this way, the logical levels and the phases of the logical levels are assigned to the nodes in such a way that the logical levels do not overlap with each other at any timings each corresponding to a point of time.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: November 24, 2009
    Assignee: Sony Corporation
    Inventors: Yukihisa Kinugasa, Masahiro Segami, Isao Hirota
  • Publication number: 20090134911
    Abstract: Three devices such as electric charge-coupled devices are each included in one of three phase impedance circuits composing a 3-phase LC resonance circuit as a device having a capacitive impedance. A driver circuit applies either of a logic level of 0, a high-impedance level or a logic level of 1 to each of nodes Node_A, Node_B and Node_C of the phase impedance circuits so as to result in sequential transitions of a state of resonance among the phase impedance circuits. In an operation to drive the phase impedance circuits, either of the logic level of 0, the high-impedance level and the logic level of 1 is applied to each of the nodes so as to sustain a phase difference of 2?/3 between the phase impedance circuits. In this way, the logical levels and the phases of the logical levels are assigned to the nodes in such a way that the logical levels do not overlap with each other at any timings each corresponding to a point of time.
    Type: Application
    Filed: February 27, 2006
    Publication date: May 28, 2009
    Inventors: Yukihisa Kinugasa, Masahiro Segami, Isao Hirota
  • Publication number: 20070188637
    Abstract: A drive circuit applying two or more drive voltages to a charge transfer unit includes at least one current mirror circuit that receives a reference current and outputs a predetermined current; at least one switch circuit that switches the current output from the at least one current mirror circuit to apply the multiple drive voltages to the charge transfer unit; and at least one time constant circuit that gives a predetermined time constant to the reference current in the switching by the switch circuit.
    Type: Application
    Filed: January 31, 2007
    Publication date: August 16, 2007
    Inventors: Azuma Kawabe, Hidenobu Kakioka, Fumiaki Fukuoka, Isao Hirota, Masahiro Segami, Yukihisa Kinugasa
  • Patent number: 6822501
    Abstract: Offset voltage correction apparatus and method correct an input offset voltage in a comparator circuit with a very high accuracy. To detect an input offset voltage in a comparator, a counter circuit performs both up-count and down-count operations on a clock signal. An offset voltage correction circuit obtains a value (counter value) of a counter signal corresponding to an input offset voltage provided at the transition in a comparison signal from “1” to “0” and a value (counter value) of the counter signal corresponding to an input offset voltage provided at the transition from “0” to “1.” The offset voltage correction circuit performs a predetermined arithmetic operation using the counter values. The offset voltage in the comparator is corrected in accordance with this arithmetic operation result.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: November 23, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yukihisa Kinugasa
  • Patent number: 6683549
    Abstract: A digital-to-analog converter which can be used with multi-bit digital codes without increasing the module size thereof, as well as a current source and a differential amplifier, which are preferably used in the digital-to-analog converter. A constant current source supplies a current corresponding to the LSB in a digital code to be converted, resistors generate voltages corresponding to bits other than the LSB in the digital code, and as the generated voltages are applied to the gate terminals of MOSFETs, the MOSFETs permit passage of the currents corresponding to the bits other than the LSB in the digital code. A current source, together with the resistors, provides voltages to be applied to the gate terminals of the MOSFETs, which voltages make the MOSFETs operate in a sub-threshold region, and also make the MOSFETs permit passage of the currents corresponding to the bits.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: January 27, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yukihisa Kinugasa
  • Publication number: 20030117305
    Abstract: A digital-to-analog converter which can be used with multi-bit digital codes without increasing the module size thereof, as well as a current source and a differential amplifier, which are preferably used in the digital-to-analog converter. A constant current source supplies a current corresponding to the LSB in a digital code to be converted, resistors generate voltages corresponding to bits other than the LSB in the digital code, and as the generated voltages are applied to the gate terminals of MOSFETs, the MOSFETs permit passage of the currents corresponding to the bits other than the LSB in the digital code. A current source, together with the resistors, provides voltages to be applied to the gate terminals of the MOSFETs, which voltages make the MOSFETs operate in a sub-threshold region, and also make the MOSFETs permit passage of the currents corresponding to the bits.
    Type: Application
    Filed: September 19, 2002
    Publication date: June 26, 2003
    Inventor: Yukihisa Kinugasa