Patents by Inventor Yukihito Iida

Yukihito Iida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240029653
    Abstract: Disclosed herein is a display device including: a pixel array portion; a drive portion; and a power source wiring; the pixel array portion, at least a part of the drive portion configured to drive the pixel array portion and the power source wiring are forming a panel, the pixel array portion including scanning lines disposed in rows, signal lines disposed in columns, and pixels disposed in matrix in portions where the scanning lines and the signal lines cross each other, respectively, the drive portion including a scanner portion configured to drive the pixels in a line-sequential manner through the scanning lines, and a signal portion configured to supply a video signal to each of the signal lines in correspondence to the line-sequential drive, so that an image is displayed on the pixel array portion.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 25, 2024
    Inventors: Tetsuo Minami, Yukihito Iida, Katsuhide Uchino
  • Publication number: 20230395617
    Abstract: There is provided a solid-state imaging device capable of preventing the sensitivity difference from being generated between the pixels. The fixed imaging device of the present disclosure includes: a first pixel; and a second pixel located in a first direction of the first pixel, in which each of the first and second pixels includes a first transistor and a second transistor, and the first and second transistors in the second pixel are disposed periodically in the first direction with respect to the first and second transistors in the first pixel.
    Type: Application
    Filed: October 19, 2021
    Publication date: December 7, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Mikinori ITO, Natsuko OOTANI, Yutaro KOMURO, Akira OKADA, Yuhei AOTANI, Yuichi YAMAGUCHI, Tsubasa SAKAKI, Masumi ABE, Kodai KANEYASU, Yuta NOGUCHI, Kazuki TAKAHASHI, Hirofumi YAMADA, Kohei YAMASHINA, Ryosuke TAKAHASHI, Yoshiki SAITO, Yusuke KIKUCHI, Yukihito IIDA, Kenichi OBATA, Ryuichi ITOH, Yuki UEMURA
  • Patent number: 11727870
    Abstract: Disclosed herein is a display device including: a pixel array portion; a drive portion; and a power source wiring; the pixel array portion, at least a part of the drive portion configured to drive the pixel array portion and the power source wiring are forming a panel, the pixel array portion including scanning lines disposed in rows, signal lines disposed in columns, and pixels disposed in matrix in portions where the scanning lines and the signal lines cross each other, respectively, the drive portion including a scanner portion configured to drive the pixels in a line-sequential manner through the scanning lines, and a signal portion configured to supply a video signal to each of the signal lines in correspondence to the line-sequential drive, so that an image is displayed on the pixel array portion.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: August 15, 2023
    Assignee: Sony Group Corporation
    Inventors: Tetsuo Minami, Yukihito Iida, Katsuhide Uchino
  • Publication number: 20220140462
    Abstract: A directional coupler is provided that includes a primary line that transmits signals from a first terminal to a second terminal; a secondary line that gets coupled with the primary line and draws some of the signals into a third terminal; a first switching unit that switches the connection destination of the third terminal between one end of the secondary line and the other end thereof; a first impedance regulating unit that is installed in between one end of the secondary line and the ground, and that changes the impedance according to the frequency of the signals; a second impedance regulating unit that is installed in between the other end of the secondary line and the ground, and changes the impedance according to the frequency of the signals; and a resonance circuit that is installed in between the first switching unit and the third terminal, and that changes the impedance of the third terminal according to the frequency of the signals.
    Type: Application
    Filed: February 17, 2020
    Publication date: May 5, 2022
    Inventors: Yoshiki SUGAWARA, Yukihito IIDA, Satoshi SUDA
  • Publication number: 20210264855
    Abstract: Disclosed herein is a display device including: a pixel array portion; a drive portion; and a power source wiring; the pixel array portion, at least a part of the drive portion configured to drive the pixel array portion and the power source wiring are forming a panel, the pixel array portion including scanning lines disposed in rows, signal lines disposed in columns, and pixels disposed in matrix in portions where the scanning lines and the signal lines cross each other, respectively, the drive portion including a scanner portion configured to drive the pixels in a line-sequential manner through the scanning lines, and a signal portion configured to supply a video signal to each of the signal lines in correspondence to the line-sequential drive, so that an image is displayed on the pixel array portion.
    Type: Application
    Filed: May 7, 2021
    Publication date: August 26, 2021
    Inventors: Tetsuo Minami, Yukihito Iida, Katsuhide Uchino
  • Patent number: 11004390
    Abstract: A display panel including pixels disposed on a substrate, where each of the pixels includes a light emitting element, and a capacitor. The capacitor of a first one of the pixels is partially overlapped, in a vertical direction, by respective pixel areas of two of the pixels. The anode of the capacitor of the first one of the pixels may be disposed closer to the substrate than a cathode of the capacitor, thereby reducing a parasitic capacitance between the capacitor and an anode of the light emitting element of one of the two pixels overlapping the capacitor.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: May 11, 2021
    Assignee: Sony Corporation
    Inventors: Mitsuru Asano, Yukihito Iida
  • Patent number: 10872560
    Abstract: A display device including: a pixel array section; power supply lines; and auxiliary electrodes, wherein each pixel has an auxiliary capacitance, and one of electrodes of the auxiliary capacitance is connected to the source electrode of the drive transistor, and another electrode is connected to the auxiliary electrode for the pixel.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: December 22, 2020
    Assignee: Sony Corporation
    Inventors: Yukihito Iida, Tetsuo Minami, Takao Tanikame, Katsuhide Uchino
  • Patent number: 10707291
    Abstract: The present invention relates to an image display device and a method for repairing a short circuit failure. The present invention is applicable to, for example, an active matrix type image display device using an organic EL device, and a short circuit location between wiring patterns is able to be repaired. In a scanning line WSL or a signal line DTL, a bypass wiring pattern BP for bypassing a region where the signal line DTL and the scanning line WSL intersect with each other is provided. By using the bypass wiring pattern BP, a short circuit location between wiring patterns is repaired.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: July 7, 2020
    Assignee: Sony Corporation
    Inventors: Yukihito Iida, Takayuki Taneda, Katsuhide Uchino
  • Publication number: 20200202780
    Abstract: A display panel including pixels disposed on a substrate, where each of the pixels includes a light emitting element, and a capacitor. The capacitor of a first one of the pixels is partially overlapped, in a vertical direction, by respective pixel areas of two of the pixels. The anode of the capacitor of the first one of the pixels may be disposed closer to the substrate than a cathode of the capacitor, thereby reducing a parasitic capacitance between the capacitor and an anode of the light emitting element of one of the two pixels overlapping the capacitor.
    Type: Application
    Filed: February 27, 2020
    Publication date: June 25, 2020
    Inventors: Mitsuru Asano, Yukihito Iida
  • Patent number: 10607541
    Abstract: A display panel including pixels disposed on a substrate, where each of the pixels includes a light emitting element, and a capacitor. The capacitor of a first one of the pixels is partially overlapped, in a vertical direction, by respective pixel areas of two of the pixels. The anode of the capacitor of the first one of the pixels may be disposed closer to the substrate than a cathode of the capacitor, thereby reducing a parasitic capacitance between the capacitor and an anode of the light emitting element of one of the two pixels overlapping the capacitor.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: March 31, 2020
    Assignee: Sony Corporation
    Inventors: Mitsuru Asano, Yukihito Iida
  • Patent number: 10586492
    Abstract: A pixel circuit includes a switching transistor whose conduction is controlled by a drive signal supplied to the control terminal, a drive wiring adapted to propagate the drive signal, and a data wiring adapted to propagate a data signal. A multi-layered wiring structure is used so that a second wiring layer is formed on a layer different from that on which a first wiring layer is formed.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: March 10, 2020
    Assignee: Sony Corporation
    Inventors: Tetsuo Minami, Yukihito Iida, Katsuhide Uchino
  • Patent number: 10559636
    Abstract: The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the second line and an electrode of the light emitting element. Either the first line or the second line is wired in a region that overlaps a light emitting region of the light emitting element in a lamination direction of layers. The second line intersects the first line outside of the light emitting region and overlaps a non-light emitting region of the light emitting element.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: February 11, 2020
    Assignee: Sony Corporation
    Inventors: Yukihito Iida, Akitsuna Takagi, Katsuhide Uchino
  • Patent number: 10431645
    Abstract: A display device including a pixel array unit having a matrix of pixels each configured such that an anode electrode of an organic electroluminescent element is connected to a source electrode of a drive transistor, a gate electrode of the drive transistor is connected to a source or drain electrode of a writing transistor, and a storage capacitor is connected between the gate and source electrodes of the drive transistor, scanning lines and power supply lines for individual pixel rows, and signal lines for individual pixel columns. A video signal reference potential is supplied to the signal lines for a period during which a scanning signal is supplied to the scanning lines during driving of pixels in a preceding row. During threshold correction for the drive transistor in a current pixel, the video signal reference potential and a potential of the cathode electrode of the organic electroluminescent element are equal.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: October 1, 2019
    Assignee: SONY CORPORATION
    Inventors: Yukihito Iida, Mitsuru Asano, Katsuhide Uchino
  • Publication number: 20190221635
    Abstract: The present invention relates to an image display device and a method for repairing a short circuit failure. The present invention is applicable to, for example, an active matrix type image display device using an organic EL device, and a short circuit location between wiring patterns is able to be repaired. In a scanning line WSL or a signal line DTL, a bypass wiring pattern BP for bypassing a region where the signal line DTL and the scanning line WSL intersect with each other is provided. By using the bypass wiring pattern BP, a short circuit location between wiring patterns is repaired.
    Type: Application
    Filed: March 25, 2019
    Publication date: July 18, 2019
    Inventors: Yukihito Iida, Takayuki Taneda, Katsuhide Uchino
  • Patent number: 10276645
    Abstract: The present invention relates to an image display device and a method for repairing a short circuit failure. The present invention is applicable to, for example, an active matrix type image display device using an organic EL device, and a short circuit location between wiring patterns is able to be repaired. In a scanning line WSL or a signal line DTL, a bypass wiring pattern BP for bypassing a region where the signal line DTL and the scanning line WSL intersect with each other is provided. By using the bypass wiring pattern BP, a short circuit location between wiring patterns is repaired.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: April 30, 2019
    Assignee: Sony Corporation
    Inventors: Yukihito Iida, Takayuki Taneda, Katsuhide Uchino
  • Publication number: 20190109183
    Abstract: A display device including a pixel array unit having a matrix of pixels each configured such that an anode electrode of an organic electroluminescent element is connected to a source electrode of a drive transistor, a gate electrode of the drive transistor is connected to a source or drain electrode of a writing transistor, and a storage capacitor is connected between the gate and source electrodes of the drive transistor, scanning lines and power supply lines for individual pixel rows, and signal lines for individual pixel columns. A video signal reference potential is supplied to the signal lines for a period during which a scanning signal is supplied to the scanning lines during driving of pixels in a preceding row. During threshold correction for the drive transistor in a current pixel, the video signal reference potential and a potential of the cathode electrode of the organic electroluminescent element are equal.
    Type: Application
    Filed: November 29, 2018
    Publication date: April 11, 2019
    Applicant: Sony Corporation
    Inventors: Yukihito Iida, Mitsuru Asano, Katsuhide Uchino
  • Publication number: 20190058023
    Abstract: The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the second line and an electrode of the light emitting element. Either the first line or the second line is wired in a region that overlaps a light emitting region of the light emitting element in a lamination direction of layers. The second line intersects the first line outside of the light emitting region and overlaps a non-light emitting region of the light emitting element.
    Type: Application
    Filed: October 17, 2018
    Publication date: February 21, 2019
    Inventors: Yukihito Iida, Akitsuna Takagi, Katsuhide Uchino
  • Patent number: 10170533
    Abstract: A display device including a pixel array unit having a matrix of pixels each configured such that an anode electrode of an organic electroluminescent element is connected to a source electrode of a drive transistor, a gate electrode of the drive transistor is connected to a source or drain electrode of a writing transistor, and a storage capacitor is connected between the gate and source electrodes of the drive transistor, scanning lines and power supply lines for individual pixel rows, and signal lines for individual pixel columns. A video signal reference potential is supplied to the signal lines for a period during which a scanning signal is supplied to the scanning lines during driving of pixels in a preceding row. During threshold correction for the drive transistor in a current pixel, the video signal reference potential and a potential of the cathode electrode of the organic electroluminescent element are equal.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: January 1, 2019
    Assignee: SONY CORPORATION
    Inventors: Yukihito Iida, Mitsuru Asano, Katsuhide Uchino
  • Patent number: 10147355
    Abstract: A pixel circuit includes a switching transistor whose conduction is controlled by a drive signal supplied to the control terminal, a drive wiring adapted to propagate the drive signal, and a data wiring adapted to propagate a data signal. A multi-layered wiring structure is used so that a second wiring layer is formed on a layer different from that on which a first wiring layer is formed.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: December 4, 2018
    Assignee: Sony Corporation
    Inventors: Tetsuo Minami, Yukihito Iida, Katsuhide Uchino
  • Patent number: 10121836
    Abstract: The display device including a pixel circuit has a first line, a transistor, a light emitting element, and a second line. The transistor is located between the second line and an electrode of the light emitting element. Either the first line or the second line is wired in a region that overlaps a light emitting region of the light emitting element in a lamination direction of layers. The second line intersects the first line outside of the light emitting region and overlaps a non-light emitting region of the light emitting element.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: November 6, 2018
    Assignee: Sony Corporation
    Inventors: Yukihito Iida, Akitsuna Takagi, Katsuhide Uchino