Patents by Inventor Yukimasa Hayashida

Yukimasa Hayashida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240297104
    Abstract: An object of the present invention is to provide a power semiconductor device enabling a downsizing of a module. A power semiconductor device according to the present invention includes: emitter main electrodes each provided in each of a plurality of semiconductor chips; and main electrode emitter sense terminals directly connected to each of the emitter main electrodes and partially exposed outside a module, wherein each of the main electrode emitter sense terminals is located diagonally to each other, and a distance from each of the main electrode emitter sense terminals to each of the emitter main electrodes connected to each of the main electrode emitter sense terminals is smaller than a distance between the main electrode emitter sense terminals in a plan view outside the module.
    Type: Application
    Filed: November 28, 2019
    Publication date: September 5, 2024
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Daisuke OYA, Yukimasa HAYASHIDA, Tetsuo MOTOMIYA
  • Patent number: 11996299
    Abstract: A semiconductor chip (6,7) is connected to a metal pattern (5). A shear drop surface (15) of an electrode (9) is bonded to the metal pattern (5). A burr (20) is formed at an end portion of the burr surface (16) of the electrode (9). A crushing amount of the end portion of the burr surface (16) is equal to or less than 10 ?m.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: May 28, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yukimasa Hayashida, Isao Umezaki, Goro Yasutomi
  • Publication number: 20230352380
    Abstract: A semiconductor chip (6) is bonded to a metal pattern (5) of an insulating substrate (2). A recess (12) and a groove (13) are formed on an upper surface of an electrode (7). The groove (13) reaches a side surface of the electrode (7) from the recess (12). First solder (15) is placed in the recess (12). Second solder (17) is provided between an upper surface of the metal pattern (5) and a lower surface of the electrode (7). The first solder (15) and the second solder (17) are melted. The melted first solder (15) are fused to the second solder (17) via the groove (13) to form a solder fillet (14) which bonds the upper surface of the metal pattern (5) to the lower surface of the electrode (7) and covers the upper surface of the electrode (7).
    Type: Application
    Filed: March 5, 2021
    Publication date: November 2, 2023
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yukimasa HAYASHIDA
  • Patent number: 11569141
    Abstract: A semiconductor device includes a first electrode; a second electrode; a resin case surrounding the first electrode and the second electrode; and a resin insulating part made of a material the same as a material of the resin case and covering part of the first electrode and part of the second electrode inside the resin case. The resin insulating part contacts an inner wall of the resin case or is separated from the inner wall of the resin case. A move positioned between the first electrode and the second electrode is formed at the resin insulating part, and thus a space in which the resin insulating part does not exist or a material different from the resin insulating part is provided between the first electrode and the second electrode.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: January 31, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Daisuke Oya, Yukimasa Hayashida, Tetsuo Motomiya
  • Patent number: 11488896
    Abstract: An object is to provide a technique capable of enhancing electrical characteristics and reliability of a semiconductor device. The semiconductor device includes a plurality of semiconductor chips, a plurality of electrodes each being electrically connected to each of the plurality of semiconductor chips, a sealing member, and a joint part. The sealing member covers the plurality of semiconductor chips, and parts being connected to the plurality of semiconductor chips, of the plurality of electrodes. The joint part is disposed outside the sealing member to electrically connect parts which are not covered by the sealing member, of the plurality of electrodes.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: November 1, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yukimasa Hayashida, Shigeru Hasegawa, Ryo Tsuda, Ryutaro Date, Junichi Nakashima
  • Publication number: 20220238459
    Abstract: Failure analysis and recycle of a semiconductor device are facilitated, and a production efficiency of the semiconductor device is improved. An exterior includes an inner space and an inner surface surrounding the inner space. A semiconductor chip is housed in the inner space and mounted on the inner surface. A first sealing material fills the inner space, is disposed on the inner surface to be overlapped on the semiconductor chip, and is made up of silicone gel. A waterproof water-repellent layer is housed in the inner space, disposed on the inner surface to be overlapped on the semiconductor chip and the first sealing material, and made up of fluorine-series resin or silicone-series resin. A second sealing material fills the inner space, is disposed on the inner surface to be overlapped on the semiconductor chip, the first sealing material, and the waterproof water-repellent layer, and is made up of silicone gel.
    Type: Application
    Filed: August 20, 2019
    Publication date: July 28, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yukimasa HAYASHIDA
  • Patent number: 11239124
    Abstract: An object is to provide a technique capable of fixing a cover to a container body without using a dedicated fixation mechanism and fixation member. A semiconductor device includes: a container body having a space with an opening; a semiconductor element disposed in the space in the container body; a sealing member disposed in the space in the container body to cover the semiconductor element; and a cover covering the opening of the container body, wherein a convex portion protruding into the space is provided on the cover, and the cover is fixed to the container body only by embedding at least a tip portion of the convex portion in the sealing member which has been cured.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: February 1, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Yukimasa Hayashida
  • Publication number: 20210217675
    Abstract: A semiconductor device includes a first electrode; a second electrode; a resin case surrounding the first electrode and the second electrode; and a resin insulating part made of a material the same as a material of the resin case and covering part of the first electrode and part of the second electrode inside the resin case. The resin insulating part contacts an inner wall of the resin case or is separated from the inner wall of the resin case. A move positioned between the first electrode and the second electrode is formed at the resin insulating part, and thus a space in which the resin insulating part does not exist or a material different from the resin insulating part is provided between the first electrode and the second electrode.
    Type: Application
    Filed: August 8, 2018
    Publication date: July 15, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Daisuke OYA, Yukimasa HAYASHIDA, Tetsuo MOTOMIYA
  • Patent number: 11063025
    Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: July 13, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Junichi Nakashima, Shota Morisaki, Yoshiko Tamada, Yasushi Nakayama, Tetsu Negishi, Ryo Tsuda, Yukimasa Hayashida, Ryutaro Date
  • Patent number: 11049803
    Abstract: A semiconductor module includes: an insulating substrate; a metal pattern provided on the insulating substrate; a solder resist provided on the metal pattern; a semiconductor chip mounted on the metal pattern at an opening portion of the solder resist; and a sealing material sealing the metal pattern, the solder resist and the semiconductor chip, wherein a suction area surrounded by a groove is provided in a portion of the solder resist.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: June 29, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Matsumoto, Yukimasa Hayashida
  • Publication number: 20210134607
    Abstract: A semiconductor chip (6,7) is connected to a metal pattern (5). A shear drop surface (15) of an electrode (9) is bonded to the metal pattern (5). A burr (20) is formed at an end portion of the burr surface (16) of the electrode (9). A crushing amount of the end portion of the burr surface (16) is equal to or less than 10 ?m.
    Type: Application
    Filed: October 23, 2018
    Publication date: May 6, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yukimasa HAYASHIDA, Isao UMEZAKI, Goro YASUTOMI
  • Patent number: 10804253
    Abstract: First and second circuit patterns (5,6) are provided on an insulating substrate (1). First and second semiconductor chips (7,8) are provided on the first circuit pattern (5). A relay circuit pattern (10) is provided between the first semiconductor chip (7) and the second semiconductor chip (8) on the insulating substrate (1). A wire (11) is continuously connected to the first semiconductor chip (7), the relay circuit pattern (10), the second semiconductor chip (8) and the second circuit pattern (6) which are sequentially arranged in one direction.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: October 13, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yukimasa Hayashida, Ryo Tsuda, Ryutaro Date
  • Patent number: 10748830
    Abstract: A wiring board (2) is provided on a heat radiation plate (1). A semiconductor chip (8) is provided on the wiring board (2). A case housing (10) is provided on the heat radiation plate (1) and surrounds the wiring board (2) and the semiconductor chip (8). Adhesive agent (11) bonds a lower surface of the case housing (10) and an upper surface peripheral portion of the heat radiation plate (1). A sealing material (13) is filled in the case housing (10) and covers the wiring board (2) and the semiconductor chip (8). A step portion (16,17) is provided to at least one of the lower surface of the case housing (10) and the upper surface peripheral portion of the heat radiation plate (1). A side surface of the heat radiation plate (1) and an outer side surface of the case housing (10) are flush with each other.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: August 18, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yukimasa Hayashida, Daisuke Oya, Takayuki Matsumoto, Ryutaro Date
  • Publication number: 20200243411
    Abstract: An object is to provide a technique capable of fixing a cover to a container body without using a dedicated fixation mechanism and fixation member. A semiconductor device includes: a container body having a space with an opening; a semiconductor element disposed in the space in the container body; a sealing member disposed in the space in the container body to cover the semiconductor element; and a cover covering the opening of the container body, wherein a convex portion protruding into the space is provided on the cover, and the cover is fixed to the container body only by embedding at least a tip portion of the convex portion in the sealing member which has been cured.
    Type: Application
    Filed: May 10, 2017
    Publication date: July 30, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventor: Yukimasa HAYASHIDA
  • Patent number: 10692794
    Abstract: A radiation plate structure includes a radiation plate, and a solder resist disposed on a main surface of the radiation plate and having at least one opening. The solder resist is made of any of polyimide (PI), polyamide (PA), polypropylene (PP), polyphenylene sulfide (PPS), a resin containing particulate ceramic (e.g., aluminum nitride (AlN), silicon nitride (Si3N4), or aluminum oxide (Al2O3)), and a high-melting-point insulator made of, for instance, glass.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: June 23, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yukimasa Hayashida, Hiroki Shiota
  • Publication number: 20200185359
    Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.
    Type: Application
    Filed: August 27, 2018
    Publication date: June 11, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Junichi NAKASHIMA, Shota MORISAKI, Yoshiko TAMADA, Yasushi NAKAYAMA, Tetsu NEGISHI, Ryo TSUDA, Yukimasa HAYASHIDA, Ryutaro DATE
  • Publication number: 20200185315
    Abstract: A semiconductor module includes: an insulating substrate; a metal pattern provided on the insulating substrate; a solder resist provided on the metal pattern; a semiconductor chip mounted on the metal pattern at an opening portion of the solder resist; and a sealing material sealing the metal pattern, the solder resist and the semiconductor chip, wherein a suction area surrounded by a groove is provided in a portion of the solder resist.
    Type: Application
    Filed: November 17, 2017
    Publication date: June 11, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takayuki MATSUMOTO, Yukimasa HAYASHIDA
  • Publication number: 20200111772
    Abstract: First and second circuit patterns (5,6) are provided on an insulating substrate (1). First and second semiconductor chips (7,8) are provided on the first circuit pattern (5). A relay circuit pattern (10) is provided between the first semiconductor chip (7) and the second semiconductor chip (8) on the insulating substrate (1). A wire (11) is continuously connected to the first semiconductor chip (7), the relay circuit pattern (10), the second semiconductor chip (8) and the second circuit pattern (6) which are sequentially arranged in one direction.
    Type: Application
    Filed: August 10, 2016
    Publication date: April 9, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yukimasa HAYASHIDA, Ryo TSUDA, Ryutaro DATE
  • Patent number: 10483175
    Abstract: An object of the present invention to provide a technique which can put flexibility into positions, positional relationships, and sizes of constituent elements. A power semiconductor device includes: a substrate on which a semiconductor chip is disposed; an electrode which has one end fixed to the substrate and stands upright on the substrate; and an insulating case which houses the electrode and has a part opposed to the other end of the electrode. The power semiconductor device includes a conductive nut which is inserted into the case in the part of the case and a conductive component which electrically connects the other end of the electrode and the nut.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: November 19, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shoko Araki, Yukimasa Hayashida, Ryutaro Date
  • Patent number: 10361136
    Abstract: It is an object of the present invention to provide a semiconductor device which allows an increase in the number of semiconductor elements mounted in parallel and prevents a shape of an insulating substrate onto which the semiconductor elements are mounted, from being laterally long, and provide a semiconductor module including such semiconductor device. A semiconductor device according to the present invention includes an insulating substrate, a metal pattern which is a continuous piece and is bonded to one main surface of the insulating substrate, and a plurality of switching elements which are bonded to a surface opposite to the insulating substrate on the metal pattern, and the plurality of switching elements are arranged in a matrix of two or more rows and two or more columns on the metal pattern.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: July 23, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shigeru Hasegawa, Isao Umezaki, Ryo Tsuda, Yukimasa Hayashida, Ryutaro Date