Patents by Inventor Yukimasa Ishida
Yukimasa Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110147596Abstract: A photoelectric conversion device is provided and includes: a photoelectric conversion panel in which light detection portions each having a charge storage portion storing light as electric charges are two-dimensionally arranged; a reading control unit that reads the electric charges stored in the charge storage portions of the photoelectric conversion panel for each reading signal line; and a reset unit that is connected to the reading signal lines and discharges residual charges of the charge storage portions for each reading signal line. The reading control unit and the reset unit are arranged at different end portions of the photoelectric conversion panel.Type: ApplicationFiled: January 10, 2011Publication date: June 23, 2011Applicant: SONY CORPORATIONInventors: Yukimasa Ishida, Takashi Sato, Yasushi Yamazaki
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Publication number: 20110141550Abstract: A protection circuit includes: a first electrode; a second electrode; and an ionic material which comes into contact with the first electrode and the second electrode, wherein when a given difference in potential is generated between the first electrode and the second electrode, an electric current flows between the first electrode and the second electrode through the ionic material.Type: ApplicationFiled: December 7, 2010Publication date: June 16, 2011Applicant: Seiko Epson CorporationInventor: Yukimasa Ishida
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Patent number: 7956313Abstract: There is provided a solid-state image pickup device that has a plurality of scanning lines that extends in a predetermined direction, a plurality of data lines that extends in a direction for intersecting the scanning lines, and a plurality of bias lines within an image pickup area on a substrate. For each of a plurality of pixels disposed in positions corresponding to intersections of the plurality of scanning lines and the plurality of data lines, a field effect transistor that is controlled by the scanning line and a photoelectric conversion element that has a electrode electrically connected to the data line through the field effect transistor and a electrode electrically connected to the bias line are formed, and a constant electric potential line for electrostatic protection is formed on the substrate. For each of bias lines, a bias line electrostatic protection circuit having a protection diode.Type: GrantFiled: April 13, 2009Date of Patent: June 7, 2011Assignee: Epson Imaging Devices CorporationInventors: Takashi Sato, Yukimasa Ishida, Yasushi Yamazaki
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Publication number: 20090302202Abstract: There is provided a solid-state image pickup device that has a plurality of scanning lines that extends in a predetermined direction, a plurality of data lines that extends in a direction for intersecting the scanning lines, and a plurality of bias lines within an image pickup area on a substrate. For each of a plurality of pixels disposed in positions corresponding to intersections of the plurality of scanning lines and the plurality of data lines, a field effect transistor that is controlled by the scanning line and a photoelectric conversion element that has a electrode electrically connected to the data line through the field effect transistor and a electrode electrically connected to the bias line are formed, and a constant electric potential line for electrostatic protection is formed on the substrate. For each of bias lines, a bias line electrostatic protection circuit having a protection diode.Type: ApplicationFiled: April 13, 2009Publication date: December 10, 2009Applicant: EPSON IMAGING DEVICES CORPORATIONInventors: Takashi Sato, Yukimasa Ishida, Yasushi Yamazaki
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Publication number: 20090267121Abstract: A solid-state image pickup device is provided which includes a substrate; a transistor formed on the substrate; a photoelectric conversion element including a first electrode connected to a drain or a source of the transistor, a semiconductor layer stacked on the first electrode, and a second electrode stacked on the semiconductor layer; an insulating layer disposed on the second electrode; and a bias line formed on the insulating layer to be connected to the second electrode, in which the insulating layer contains at least an inorganic insulating film, and the bias line is connected to the second electrode via a contact hole formed in the insulating layer, and a side surface of the semiconductor layer is in contact with the inorganic insulating film.Type: ApplicationFiled: February 5, 2009Publication date: October 29, 2009Applicant: EPSON IMAGING DEVICES CORPORATIONInventors: Yukimasa ISHIDA, Takashi SATO, Yasushi YAMAZAKI
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Patent number: 7115904Abstract: To provide an organic electroluminescent device, a manufacturing method thereof, and an electronic apparatus, which can reduce wiring line resistance, lower power consumption, suppress heating and uniformize brightness. There is provided a method of manufacturing an organic electroluminescent device comprising, on a first electrode, a light-emitting functional layer surrounded by a first partition and a second partition. The method comprises a step of sequentially film-forming a first electrode material and a first partition material on an interlayer insulating film, a step of patterning the first electrode material and the first partition material with a mask to form the first electrode and the first partition in the same shape, and a step of forming the second partition on the interlayer insulating film and the first partition material.Type: GrantFiled: December 17, 2004Date of Patent: October 3, 2006Assignee: Seiko Epson CorporationInventors: Yukimasa Ishida, Ryoichi Nozawa
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Patent number: 7098985Abstract: The invention provides highly reliable wiring and connection terminals of an electro-optic device used as a transfiective liquid crystal device or the like. Since sidewalls and a part of an upper surface of a data line are covered with a reflection film, a central layer is not etched by an etchant when the reflection film is formed by patterning. In addition, since a transparent conductive film is connected to an upper layer of the data line via a contact hole, the resistance of a connection terminal can be decreased, and superior conduction can be obtained.Type: GrantFiled: September 2, 2003Date of Patent: August 29, 2006Assignee: Seiko Epson CorporationInventor: Yukimasa Ishida
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Publication number: 20060070071Abstract: An instruction file execution device which includes a receiver, a comparison section and a job execution section. The receiver receives an instruction file and a usable money amount, which instruction file describes a job flow which defines linking of a number of jobs. The comparison section compares an execution charge of a job being handled of the jobs of the instruction file received by the receiver with the usable money amount received by the receiver. If the comparison section determines that the usable money amount is greater than or equal to the execution charge, the job execution section executes the job being handled.Type: ApplicationFiled: March 15, 2005Publication date: March 30, 2006Applicant: FUJI XEROX CO., LTD.Inventors: Yasuyuki Shimizu, Hitoshi Tsushima, Kenji Tsutsumi, Takashi Hirata, Takayuki Asako, Takuya Honda, Yukimasa Ishida, Hiroshi Yamamoto
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Publication number: 20060066893Abstract: An instruction file execution device includes: a receiver that receives an instruction file that has a job flow described therein defining a cooperative linkage among jobs, and that instructs execution of predetermined processing of document data, and receives fee information and the document data when required; a determination section that determines whether any of the jobs being handled supplies information to a user based on the instruction file received by the receiver; a job execution section that executes the job being handled with respect to the document data received by the receiver; a fee calculator that adds fee information for the job being handled and fee information received by the receiver to derive new fee information; and a transmission section that transmits information, wherein when the determination section determines that the job being handled does not supply information to a user, the transmission section transmits, to an execution destination of any of the jobs subsequent to the job beinType: ApplicationFiled: March 9, 2005Publication date: March 30, 2006Applicant: Fuji Xerox Co., Ltd.Inventors: Yasuyuki Shimizu, Hitoshi Tsushima, Kenji Tsutsumi, Takashi Hirata, Takayuki Asako, Takuya Honda, Yukimasa Ishida, Hiroshi Yamamoto
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Publication number: 20060065720Abstract: A service execution device which includes a user identification information memory, an account identification information memory, a service execution section and an aggregation section. The user identification information memory stores user identification information for identifying users. The account identification information memory stores account identification information, which is associated with the user identification information and identifies accounts. The service execution section executes services in accordance with instructions from users for whom account identification information corresponding to user identification information is present and who are identified by this user identification information. The services are processes relating to document data. The aggregation section aggregates results of execution by the service execution section for each account of the account identification information.Type: ApplicationFiled: March 9, 2005Publication date: March 30, 2006Applicant: FUJI XEROX CO., LTD.Inventors: Takayuki Asako, Hitoshi Tsushima, Yasuyuki Shimizu, Kenji Tsutsumi, Takashi Hirata, Takuya Honda, Yukimasa Ishida, Hiroshi Yamamoto
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Publication number: 20050221568Abstract: To provide a manufacturing method of a semiconductor device, which can form an LDD (lightly doped drain) structure in a self alignment manner, can suppress the length of a doped region, and can prevent characteristics from being unstabilized when oversaturated hydrogen atoms are implanted, a semiconductor device, a substrate for electro-optical device, an electro-optical device, and an electronic apparatus. A manufacturing method of a semiconductor device comprises an electrode formation step of forming an electrode above a semiconductor layer, an insulating film formation step of forming insulating films containing nitrogen on the electrode, and a heat treatment step of performing a heat treatment under an atmosphere containing vapor, oxygen, or hydrogen to form nitrogen concentration distributions in the insulating films.Type: ApplicationFiled: March 28, 2005Publication date: October 6, 2005Applicant: SEIKO EPSON CORPORATIONInventors: Yukimasa Ishida, Ryoichi Nozawa
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Publication number: 20050206939Abstract: A service processing device and service linking processing method which can execute appropriate tabulation for each of service linked processings which combine a plurality of services. It is judged whether or not individual instruction information, which is transmitted from a linking processing server, has been received, and operation stands-by until receipt. Each service processing device interprets service processing request contents described in the individual instruction information, and executes a service processing. When execution of the service processing is completed, a results log of the service processing is stored in the service processing device together with a request ID, a client ID, and billing destination information.Type: ApplicationFiled: October 12, 2004Publication date: September 22, 2005Applicant: Fuji Xerox Co., Ltd.Inventors: Kenji Tsutsumi, Hitoshi Tsushima, Takashi Hirata, Takayuki Asako, Takuya Honda, Yukimasa Ishida, Hiroshi Yamamoto, Yasuyuki Shimizu
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Publication number: 20050186698Abstract: To provide an organic electroluminescent device, a manufacturing method thereof, and an electronic apparatus, which can reduce wiring line resistance, lower power consumption, suppress heating and uniformize brightness. There is provided a method of manufacturing an organic electroluminescent device comprising, on a first electrode, a light-emitting functional layer surrounded by a first partition 42a and a second partition. The method comprises a step of sequentially film-forming a first electrode material and a first partition material on an interlayer insulating film, a step of patterning the first electrode material and the first partition material with a mask to form the first electrode and the first partition in the same shape, and a step of forming the second partition on the interlayer insulating film and the first partition material.Type: ApplicationFiled: December 17, 2004Publication date: August 25, 2005Applicant: Seiko Epson CorporationInventors: Yukimasa Ishida, Ryoichi Nozawa
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Patent number: 6808963Abstract: In a process for producing a thin-film device, a conducting layer composed of an anodically oxidizable metal is formed on a substrate and is etched to form gate bus lines and gate electrode having upper surfaces parallel to the substrate and inclined side surfaces. The gate bus lines and the gate electrodes are anodically oxidized, so that they include inner conducting portions and outer insulating oxide films covering the inner conducting portions. The outer insulating films prevent the bus lines from short circuiting, and the inclined side surfaces of the bus lines makes it possible to fabricate a dense wiring arrangement.Type: GrantFiled: January 18, 2001Date of Patent: October 26, 2004Assignee: Fujitsu LimitedInventors: Yukimasa Ishida, Kenichi Nagaoka
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Publication number: 20040080688Abstract: To provide highly reliable wiring and connection terminals of an electro-optic device used as a transflective liquid crystal device or the like. Since sidewalls and a part of an upper surface of a data line 6a are covered with a reflection film 44, a central layer 62 is not etched by an etchant when the reflection film 44 is formed by patterning. In addition, since a transparent conductive film 45 is connected to an upper layer 63 of the data line 6a via a contact hole 44a, the resistance of a connection terminal 90 can be decreased, and superior conduction can be obtained.Type: ApplicationFiled: September 2, 2003Publication date: April 29, 2004Applicant: Seiko Epson CorporationInventor: Yukimasa Ishida
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Patent number: 6534789Abstract: Semiconductor islands are formed on an insulating substrate. A gate insulating layer is formed to traverse an intermediate region of each island, and a gate electrode with tapered sidewalls is formed thereon to leave wing-shaped gate insulating layer exposed at both sides. Ion implantation is done to form heavily doped regions in the semiconductor islands outside the gate insulating layers, and lightly doped drain regions under the wing regions of the gate insulating layer. An interlayer insulating layer is formed thereon to cover the gate electrodes, gate insulating layers, and the semiconductor islands. However, if the gate electrode layer and gate insulating film are patterned in the same shape, a step becomes high.Type: GrantFiled: April 9, 2001Date of Patent: March 18, 2003Assignee: Fujitsu LimitedInventor: Yukimasa Ishida
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Patent number: 6335290Abstract: In a method of etching an Al or Al alloy layer, an Al or Al alloy layer is formed on an underlying surface, the surface of the Al or Al alloy layer is processed with TMAH, a resist pattern is formed on the surface of the Al or Al alloy layer processed with TMAH, and by using the resist pattern as an etching mask, the Al or Al alloy layer is wet-etched.Type: GrantFiled: March 29, 1999Date of Patent: January 1, 2002Assignee: Fujitsu LimitedInventor: Yukimasa Ishida
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Publication number: 20010019127Abstract: In a method of etching an Al or Al alloy layer, an Al or Al alloy layer is formed on an underlying surface, the surface of the Al or Al alloy layer is processed with TMAH, a resist pattern is formed on the surface of the Al or Al alloy layer processed with TMAH, and by using the resist pattern as an etching mask, the Al or Al alloy layer is wet-etched.Type: ApplicationFiled: April 9, 2001Publication date: September 6, 2001Applicant: Fujitsu LimitedInventor: Yukimasa Ishida
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Publication number: 20010001482Abstract: In a process for producing a thin-film device, a conducting layer composed of an anodically oxidizable metal is formed on a substrate and is etched to form gate bus lines and gate electrode having upper surfaces parallel to the substrate and inclined side surfaces. The gate bus lines and the gate electrodes are anodically oxidized, so that they include inner conducting portions and outer insulating oxide films covering the inner conducting portions. The outer insulating films prevent the bus lines from short circuiting, and the inclined side surfaces of the bus lines makes it possible to fabricate a dense wiring arrangement.Type: ApplicationFiled: January 18, 2001Publication date: May 24, 2001Applicant: FUJITSU LIMITEDInventors: Yukimasa Ishida, Kenichi Nagaoka
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Patent number: 6198132Abstract: In a process for producing a thin-film device, a conducting layer composed of an anodically oxidizable metal is formed on a substrate and is etched to form gate bus lines and gate electrode having upper surfaces parallel to the substrate and inclined side surfaces. The gate bus lines and the gate electrodes are anodically oxidized, so that they include inner conducting portions and outer insulating oxide films covering the inner conducting portions. The outer insulating films prevent the bus lines from short circuiting, and the inclined side surfaces of the bus lines makes it possible to fabricate a dense wiring arrangement.Type: GrantFiled: March 13, 1998Date of Patent: March 6, 2001Assignee: Fujitsu LimitedInventors: Yukimasa Ishida, Kenichi Nagaoka