Patents by Inventor Yukinori Hamada

Yukinori Hamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972246
    Abstract: An information processing apparatus includes a processor that: receives, from a user terminal, a request for first update regarding a first vehicle, notifies the user terminal that the first update is to be performed at a shop, when the first update is update of hardware, and notifies the user terminal that the first update is to be performed through wireless communication, when the first update is update of software.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: April 30, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yuta Tone, Yukinori II, Tadayuki Tanaka, Naoki Ishizuka, Yuichiro Yano, Nariaki Amano, Yusuke Maeda, Kei Yazaki, Yu Hamada
  • Publication number: 20240119475
    Abstract: An information processing device includes a processor configured to provide an incentive to a first user who sells or returns a first vehicle in which a part of a first coating film including an easily peelable layer is not peeled off.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yukinori II, Kenji YAMAGUCHI, Junya OGAWA, Yuki NAGANUMA, Junya YAMAMOTO, Yuta TONE, Naoki ISHIZUKA, Tadayuki TANAKA, Keisuke ITO, Yuka YOKOI, Takashi HAYASHI, Naoya OKA, Yu HAMADA
  • Patent number: 4455620
    Abstract: A direct memory access control apparatus performs direct data transfer between a memory and an input/output controller in a data processing system. When the system is placed in a direct memory access mode upon receipt of a direct memory access request from the input/output controller, a data bus connected between the input/output controller and the memory is separated from a central processing unit by means of a data bus separating circuit, and an address bus of the memory is also separated from the central processing unit by means of an address bus switch circuit. The address bus of the memory is connected to a direct memory access controller by means of the address bus switch circuit. Therefore, the memory is addressed by the direct memory access controller through the address bus while the data is directly transferred between the memory and the input/output device through the data bus.
    Type: Grant
    Filed: November 24, 1981
    Date of Patent: June 19, 1984
    Assignee: Omron Tateisi Electronics Co.
    Inventors: Masakatu Watanabe, Yukinori Hamada, Ryuichi Chiwaki