Abstract: To reduce a mounting area while securing a mounting strength of a semiconductor device, a power transistor includes a chip mounting portion, a semiconductor chip, a plurality of leads, and a sealing body. An outer lead portion in each of the plurality of leads includes a first portion protruding from a second side surface of the sealing body in a first direction, a second portion extending in a second direction intersecting with the first direction, and a third portion extending in a third direction intersecting with the second direction. Furthermore, a length of the third portion in the third direction of the outer lead portion is shorter than a length of the first portion in the first direction.

Abstract: A method of manufacturing a semiconductor device is provided. A first bond of a first wire loop is formed. A wire is bonded through a ball to a lead or a chip electrode of a semiconductor chip to form a second bond of the first wire loop and a first bond of a second wire loop. A second bond of the second wire loop is formed. The ball provides a large bonding area, and thus, provides a strong bonding strength.

Abstract: A leadless type resin-sealed semiconductor package includes a resin enveloper having a mounting face to be applied to a wiring board, and at least one side face associated with the mounting face to produce an angled side edge. A semiconductor chip is encapsulated and sealed in the resin enveloper. An electrode terminal is partially buried in the angled side edge of the resin enveloper so as to be exposed to an outside, with the electrode terminal being electrically connected to the semiconductor chip. The electrode terminal is formed with a depression which is shaped so as to be opened to an outside when the resin enveloper is placed on the wiring board such that the mounting face of the resin enveloper is applied thereto.

Abstract: A leadless type semiconductor package includes a plate-like mount, and at least one semiconductor chip mounted on the plate-like mount such that a bottom surface of the semiconductor chip is secured to the plate-like mount, and the semiconductor chip has at least one electrode pad formed on a top surface thereof. The package further includes at least one flat electrode electrically connected to the electrode pad, and a molded resin enveloper for completely sealing and encapsulating the semiconductor chip. The molded resin enveloper further partially seals and encapsulates the flat electrode such that a part of the flat electrode is exposed as an outer electrode pad on a top surface of the molded resin enveloper.

Abstract: A leadless type resin-sealed semiconductor package includes a resin enveloper having a mounting face to be applied to a wiring board, and at least one side face associated with the mounting face to produce an angled side edge. A semiconductor chip is encapsulated and sealed in the resin enveloper. An electrode terminal is partially buried in the angled side edge of the resin enveloper so as to be exposed to an outside, with the electrode terminal being electrically connected to the semiconductor chip. The electrode terminal is formed with a depression which is shaped so as to be opened to an outside when the resin enveloper is placed on the wiring board such that the mounting face of the resin enveloper is applied thereto.

Abstract: A leadless type resin-sealed semiconductor package includes a resin enveloper having a mounting face to be applied to a wiring board, and at least one side face associated with the mounting face to produce an angled side edge. A semiconductor chip is encapsulated and sealed in the resin enveloper. An electrode terminal is partially buried in the angled side edge of the resin enveloper so as to be exposed to an outside, with the electrode terminal being electrically connected to the semiconductor chip. The electrode terminal is formed with a depression which is shaped so as to be opened to an outside when the resin enveloper is placed on the wiring board such that the mounting face of the resin enveloper is applied thereto.

Abstract: A leadless type semiconductor package includes a plate-like mount, and at least one semiconductor chip mounted on the plate-like mount such that a bottom surface of the semiconductor chip is secured to the plate-like mount, and the semiconductor chip has at least one electrode pad formed on a top surface thereof. The package further includes at least one flat electrode electrically connected to the electrode pad, and a molded resin enveloper for completely sealing and encapsulating the semiconductor chip. The molded resin enveloper further partially seals and encapsulates the flat electrode such that a part of the flat electrode is exposed as an outer electrode pad on a top surface of the molded resin enveloper.

Abstract: A leadless type resin-sealed semiconductor package includes a resin enveloper having a mounting face to be applied to a wiring board, and at least one side face associated with the mounting face to produce an angled side edge. A semiconductor chip is encapsulated and sealed in the resin enveloper. An electrode terminal is partially buried in the angled side edge of the resin enveloper so as to be exposed to an outside, with the electrode terminal being electrically connected to the semiconductor chip. The electrode terminal is formed with a depression which is shaped so as to be opened to an outside when the resin enveloper is placed on the wiring board such that the mounting face of the resin enveloper is applied thereto.